Texas Instruments TM4C1294NCPDT User Manual

DescriptionResetTypeNameBit/Field
9-Bit Mode Masked Interrupt Status
DescriptionValue
An interrupt has not occurred or is masked.0
An unmasked interrupt was signaled due to a receive address
match.
1
This bit is cleared by writing a 1 to the 9BITIC bit in the UARTICR
register.
0RO9BITMIS12
End of Transmission Masked Interrupt Status
DescriptionValue
An interrupt has not occurred or is masked.0
An unmasked interrupt was signaled due to the transmission of
the last data bit.
1
This bit is cleared by writing a 1 to the EOTIC bit in the UARTICR
register.
0ROEOTMIS11
UART Overrun Error Masked Interrupt Status
DescriptionValue
An interrupt has not occurred or is masked.0
An unmasked interrupt was signaled due to an overrun error.1
This bit is cleared by writing a 1 to the OEIC bit in the UARTICR register.
0ROOEMIS10
UART Break Error Masked Interrupt Status
DescriptionValue
An interrupt has not occurred or is masked.0
An unmasked interrupt was signaled due to a break error.1
This bit is cleared by writing a 1 to the BEIC bit in the UARTICR register.
0ROBEMIS9
UART Parity Error Masked Interrupt Status
DescriptionValue
An interrupt has not occurred or is masked.0
An unmasked interrupt was signaled due to a parity error.1
This bit is cleared by writing a 1 to the PEIC bit in the UARTICR register.
0ROPEMIS8
UART Framing Error Masked Interrupt Status
DescriptionValue
An interrupt has not occurred or is masked.0
An unmasked interrupt was signaled due to a framing error.1
This bit is cleared by writing a 1 to the FEIC bit in the UARTICR register.
0ROFEMIS7
1203June 18, 2014
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TM4C1294NCPDT Microcontroller

Texas Instruments TM4C1294NCPDT Specifications

General

Brand	Texas Instruments
Model	TM4C1294NCPDT
Category	Microcontrollers
Language	English