DescriptionResetTypeNameBit/Field
MAC MMC Interrupt
This bit reflects an interrupt event in the MMC module. Software must
read the corresponding EMACMMCTXRIS/EMACMMCRXRIS register
to determine the cause of the interrupt and then clear its source to reset
this bit to 0.
DescriptionValue
No MMC interrupt has occurred.0
An interrupt in the MMC module has occurred.1
0x0ROMMC27
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved26
Access Error
This field indicates the type of error that caused a bus error, for example,
error response on the internal bus interface. This field is valid only when
bit[13] (FBI) is set. This field does not generate an interrupt.
DescriptionValue
Error during RX DMA Write Data Transfer0x0
reserved0x1-0x2
Error during TX DMA Read Data Transfer0x3
Error during RX DMA Descriptor Write Access0x4
Error during TX DMA Descriptor Write Access0x5
Error during RX DMA Descriptor Read Access0x6
Error during TX DMA Descriptor Read Access0x7
0x0ROAE25:23
Transmit Process State
This field indicates the Transmit DMA state. This field does not generate
an interrupt.
DescriptionValue
Stopped; Reset or Stop transmit command processed0x0
Running; Fetching transmit transfer descriptor0x1
Running; Waiting for status0x2
Running; Reading data from host memory buffer and queuing
it to transmit buffer (TX FIFO)
0x3
Writing Timestamp0x4
reserved0x5
Suspended; Transmit descriptor unavailable or transmit buffer
underflow
0x6
Running; Closing transmit descriptor0x7
0x0ROTS22:20
June 18, 20141562
Texas Instruments-Production Data
Ethernet Controller
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