Table 26-3. Signals by Signal Name (continued)
DescriptionBuffer TypePin TypePin Mux / Pin
Assignment
Pin NumberPin Name
The positive supply for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in , regardless of system
implementation.
Power-fixed8VDDA
Positive supply for most of the logic function,
including the processor core and most peripherals.
The voltage on this pin is 1.2 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to each other and an external capacitor
as specified in Table 27-15 on page 1834 .
Power-fixed87
115
VDDC
A reference voltage used to specify the voltage at
which the ADC converts to a maximum value. This
pin is used in conjunction with GNDA. The voltage
that is applied to VREFA+ is the voltage with which
an AINn signal is converted to 4095. The VREFA+
voltage is limited to the range specified in Table
27-44 on page 1861.
Analog-fixed9VREFA+
An external input that brings the processor out of
Hibernate mode when asserted.
TTLIfixed64WAKE
Hibernation module oscillator crystal input or an
external clock reference input. Note that this is
either a crystal or a 32.768-kHz oscillator for the
Hibernation module RTC.
AnalogIfixed66XOSC0
Hibernation module oscillator crystal output. Leave
unconnected when using a single-ended clock
source.
AnalogOfixed67XOSC1
June 18, 20141796
Texas Instruments-Production Data
Signal Tables
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