Table 22-5. Analog Comparators Register Map ................................................................... 1659
Table 23-1. PWM Signals (128TQFP) ................................................................................. 1672
Table 23-2. PWM Register Map .......................................................................................... 1679
Table 24-1. QEI Signals (128TQFP) ................................................................................... 1750
Table 24-2. QEI Register Map ............................................................................................ 1754
Table 26-1. GPIO Pins With Special Considerations ............................................................ 1772
Table 26-2. Signals by Pin Number ..................................................................................... 1773
Table 26-3. Signals by Signal Name ................................................................................... 1785
Table 26-4. Signals by Function, Except for GPIO ............................................................... 1797
Table 26-5. GPIO Pins and Alternate Functions ................................................................... 1808
Table 26-6. Possible Pin Assignments for Alternate Functions .............................................. 1811
Table 26-7. Connections for Unused Signals (128-Pin TQFP) ............................................... 1816
Table 27-1. Absolute Maximum Ratings .............................................................................. 1818
Table 27-2. ESD Absolute Maximum Ratings ...................................................................... 1818
Table 27-3. Temperature Characteristics ............................................................................. 1819
Table 27-4. 128-pin TQFP Power Dissipation ...................................................................... 1819
Table 27-5. Thermal Characteristics ................................................................................... 1819
Table 27-6. Recommended DC Operating Conditions .......................................................... 1820
Table 27-7. Recommended FAST GPIO Pad Operating Conditions ...................................... 1820
Table 27-8. Recommended Slow GPIO Pad Operating Conditions ........................................ 1821
Table 27-9. GPIO Current Restrictions ................................................................................ 1821
Table 27-10. Maximum GPIO Package Side Assignments ..................................................... 1822
Table 27-11. Load Conditions ............................................................................................... 1823
Table 27-12. JTAG Characteristics ....................................................................................... 1824
Table 27-13. Power and Brown-Out Levels ........................................................................... 1826
Table 27-14. Reset Characteristics ....................................................................................... 1831
Table 27-15. LDO Regulator Characteristics ......................................................................... 1834
Table 27-16. Phase Locked Loop (PLL) Characteristics ......................................................... 1835
Table 27-17. System Divisor Factors for f
vco
=480 MHz ........................................................... 1836
Table 27-18. Actual PLL Frequency ...................................................................................... 1836
Table 27-19. PIOSC Clock Characteristics ............................................................................ 1837
Table 27-20. Low-Frequency Oscillator Characteristics .......................................................... 1837
Table 27-21. Hibernation Internal Low Frequency Oscillator Clock Characteristics ................... 1837
Table 27-22. Hibernation External Oscillator (XOSC) Input Characteristics .............................. 1837
Table 27-23. Main Oscillator Input Characteristics ................................................................. 1838
Table 27-24. Crystal Parameters .......................................................................................... 1840
Table 27-25. System Clock Characteristics with ADC Operation ............................................. 1842
Table 27-26. System Clock Characteristics with USB Operation ............................................. 1842
Table 27-27. Wake from Sleep Characteristics ...................................................................... 1843
Table 27-28. Wake from Deep Sleep Characteristics ............................................................. 1843
Table 27-29. Hibernation Module Battery Characteristics ....................................................... 1845
Table 27-30. Hibernation Module Characteristics ................................................................... 1845
Table 27-31. Hibernation Module Tamper I/O Characteristics ................................................. 1845
Table 27-32. Flash Memory Characteristics ........................................................................... 1847
Table 27-33. EEPROM Characteristics ................................................................................. 1848
Table 27-34. Fast GPIO Module Characteristics .................................................................... 1849
Table 27-35. Slow GPIO Module Characteristics ................................................................... 1850
Table 27-36. Pad Voltage/Current Characteristics for Hibernate WAKE Pin ............................. 1851
21June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller