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Texas Instruments TM4C1294NCPDT User Manual

Texas Instruments TM4C1294NCPDT
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Register 50: Ethernet MAC PPS0 Interval (EMACPPS0INTVL), offset 0x760 ...................................... 1551
Register 51: Ethernet MAC PPS0 Width (EMACPPS0WIDTH), offset 0x764 ....................................... 1552
Register 52: Ethernet MAC DMA Bus Mode (EMACDMABUSMOD), offset 0xC00 .............................. 1553
Register 53: Ethernet MAC Transmit Poll Demand (EMACTXPOLLD), offset 0xC04 ............................ 1557
Register 54: Ethernet MAC Receive Poll Demand (EMACRXPOLLD), offset 0xC08 ............................ 1558
Register 55: Ethernet MAC Receive Descriptor List Address (EMACRXDLADDR), offset 0xC0C ......... 1559
Register 56: Ethernet MAC Transmit Descriptor List Address (EMACTXDLADDR), offset 0xC10 ......... 1560
Register 57: Ethernet MAC DMA Interrupt Status (EMACDMARIS), offset 0xC14 ................................ 1561
Register 58: Ethernet MAC DMA Operation Mode (EMACDMAOPMODE), offset 0xC18 ..................... 1567
Register 59: Ethernet MAC DMA Interrupt Mask Register (EMACDMAIM), offset 0xC1C ..................... 1572
Register 60: Ethernet MAC Missed Frame and Buffer Overflow Counter (EMACMFBOC), offset
0xC20 ......................................................................................................................... 1575
Register 61: Ethernet MAC Receive Interrupt Watchdog Timer (EMACRXINTWDT), offset 0xC24 ....... 1576
Register 62: Ethernet MAC Current Host Transmit Descriptor (EMACHOSTXDESC), offset 0xC48 ...... 1577
Register 63: Ethernet MAC Current Host Receive Descriptor (EMACHOSRXDESC), offset 0xC4C ...... 1578
Register 64: Ethernet MAC Current Host Transmit Buffer Address (EMACHOSTXBA), offset 0xC50 .... 1579
Register 65: Ethernet MAC Current Host Receive Buffer Address (EMACHOSRXBA), offset 0xC54 ..... 1580
Register 66: Ethernet MAC Peripheral Property Register (EMACPP), offset 0xFC0 ............................. 1581
Register 67: Ethernet MAC Peripheral Configuration Register (EMACPC), offset 0xFC4 ..................... 1582
Register 68: Ethernet MAC Clock Configuration Register (EMACCC), offset 0xFC8 ............................ 1586
Register 69: Ethernet PHY Raw Interrupt Status (EPHYRIS), offset 0xFD0 ......................................... 1587
Register 70: Ethernet PHY Interrupt Mask (EPHYIM), offset 0xFD4 ................................................... 1588
Register 71: Ethernet PHY Masked Interrupt Status and Clear (EPHYMISC), offset 0xFD8 ................. 1589
Register 72: Ethernet PHY Basic Mode Control - MR0 (EPHYBMCR), address 0x000 ......................... 1590
Register 73: Ethernet PHY Basic Mode Status - MR1 (EPHYBMSR), address 0x001 .......................... 1592
Register 74: Ethernet PHY Identifier Register 1 - MR2 (EPHYID1), address 0x002 ............................. 1595
Register 75: Ethernet PHY Identifier Register 2 - MR3 (EPHYID2), address 0x003 ............................. 1596
Register 76: Ethernet PHY Auto-Negotiation Advertisement - MR4 (EPHYANA), address 0x004 .......... 1597
Register 77: Ethernet PHY Auto-Negotiation Link Partner Ability - MR5 (EPHYANLPA), address
0x005 .......................................................................................................................... 1599
Register 78: Ethernet PHY Auto-Negotiation Expansion - MR6 (EPHYANER), address 0x006 ............. 1601
Register 79: Ethernet PHY Auto-Negotiation Next Page TX - MR7 (EPHYANNPTR), address 0x007 .... 1602
Register 80: Ethernet PHY Auto-Negotiation Link Partner Ability Next Page - MR8 (EPHYANLNPTR),
address 0x008 ............................................................................................................. 1604
Register 81: Ethernet PHY Configuration 1 - MR9 (EPHYCFG1), address 0x009 ................................ 1606
Register 82: Ethernet PHY Configuration 2 - MR10 (EPHYCFG2), address 0x00A .............................. 1609
Register 83: Ethernet PHY Configuration 3 - MR11 (EPHYCFG3), address 0x00B .............................. 1611
Register 84: Ethernet PHY Register Control - MR13 (EPHYREGCTL), address 0x00D ....................... 1613
Register 85: Ethernet PHY Address or Data - MR14 (EPHYADDAR), address 0x00E .......................... 1615
Register 86: Ethernet PHY Status - MR16 (EPHYSTS), address 0x010 .............................................. 1616
Register 87: Ethernet PHY Specific Control- MR17 (EPHYSCR), address 0x011 ................................ 1619
Register 88: Ethernet PHY MII Interrupt Status 1 - MR18 (EPHYMISR1), address 0x012 .................... 1622
Register 89: Ethernet PHY MII Interrupt Status 2 - MR19 (EPHYMISR2), address 0x013 .................... 1625
Register 90: Ethernet PHY False Carrier Sense Counter - MR20 (EPHYFCSCR), address 0x014 ........ 1628
Register 91: Ethernet PHY Receive Error Count - MR21 (EPHYRXERCNT), address 0x015 ............... 1629
Register 92: Ethernet PHY BIST Control - MR22 (EPHYBISTCR), address 0x016 .............................. 1630
Register 93: Ethernet PHY LED Control - MR24 (EPHYLEDCR), address 0x018 ................................ 1633
Register 94: Ethernet PHY Control - MR25 (EPHYCTL), address 0x019 ............................................. 1634
Register 95: Ethernet PHY 10Base-T Status/Control - MR26 (EPHY10BTSC), address 0x01A ............ 1636
41June 18, 2014
Texas Instruments-Production Data
Tiva
TM4C1294NCPDT Microcontroller

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Texas Instruments TM4C1294NCPDT Specifications

General IconGeneral
BrandTexas Instruments
ModelTM4C1294NCPDT
CategoryMicrocontrollers
LanguageEnglish

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