DescriptionResetTypeNameBit/Field
Access Masked Interrupt Status and Clear
DescriptionValue
When read, a 0 indicates that no improper accesses have
occurred.
A write of 0 has no effect on the state of this bit.
0
When read, a 1 indicates that an unmasked interrupt was
signaled because a program or erase action was attempted on
a block of Flash memory that contradicts the protection policy
for that block as set in the FMPPEn registers.
Writing a 1 to this bit clears AMISC and also the ARIS bit in the
FCRIS register (see page 630).
1
0RW1CAMISC0
637June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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