GPIO Peripheral Configuration (GPIOPC)
GPIO Port A (AHB) base: 0x4005.8000
GPIO Port B (AHB) base: 0x4005.9000
GPIO Port C (AHB) base: 0x4005.A000
GPIO Port D (AHB) base: 0x4005.B000
GPIO Port E (AHB) base: 0x4005.C000
GPIO Port F (AHB) base: 0x4005.D000
GPIO Port G (AHB) base: 0x4005.E000
GPIO Port H (AHB) base: 0x4005.F000
GPIO Port J (AHB) base: 0x4006.0000
GPIO Port K (AHB) base: 0x4006.1000
GPIO Port L (AHB) base: 0x4006.2000
GPIO Port M (AHB) base: 0x4006.3000
GPIO Port N (AHB) base: 0x4006.4000
GPIO Port P (AHB) base: 0x4006.5000
GPIO Port Q (AHB) base: 0x4006.6000
Offset 0xFC4
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
EDM0EDM1EDM2EDM3EDM4EDM5EDM6EDM7
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:16
Extended Drive Mode Bit 7
Same encoding as EDM0, but applies to bit 7 of GPIO port.
0RWEDM715:14
Extended Drive Mode Bit 6
Same encoding as EDM0, but applies to bit 6 of GPIO port.
0RWEDM613:12
Extended Drive Mode Bit 5
Same encoding as EDM0, but applies to bit 5 of GPIO port.
0RWEDM511:10
Extended Drive Mode Bit 4
Same encoding as EDM0, but applies to bit 4 of GPIO port.
0RWEDM49:8
Extended Drive Mode Bit 3
Same encoding as EDM0, but applies to bit 3 of GPIO port.
0RWEDM37:6
Extended Drive Mode Bit 2
Same encoding as EDM0, but applies to bit 2 of GPIO port.
0RWEDM25:4
Extended Drive Mode Bit 1
Same encoding as EDM0, but applies to bit 1 of GPIO port.
0RWEDM13:2
801June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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