DescriptionResetTypeNameBit/Field
Host Bus Sub-Mode
This field determines which of three Host Bus 16 sub-modes to use.
Sub-mode use is determined by the connected external peripheral. See
Table 11-9 on page 833 for information on how this bit field affects the
operation of the EPI signals. When used with multiple chip select option
and the CSBAUD bit is set to 1 in the EPIHB16CFG2 register, this
configuration is for CS0n. If the multiple chip select option is enabled
and CSBAUD is clear, all chip-selects use the MODE encoding
programmed in this register.
DescriptionValue
ADMUX – AD[15:0]
Data and Address are muxed.
0x0
ADNONMUX – D[15:0]
Data and address are separate. This mode is not practical in
HB16 mode for normal peripherals because there are generally
not enough address bits available.
0x1
Continuous Read - D[15:0]
This mode is the same as ADNONMUX, but uses address switch
for multiple reads instead of OEn strobing. This mode is not
practical in HB16 mode for normal SRAMs because there are
generally not enough address bits available.
0x2
XFIFO – D[15:0]
This mode adds XFIFO controls with sense of XFIFO full and
XFIFO empty. This mode uses no address or ALE.
Note that the XFIFO can only be used in asynchronous mode.
0x3
0x0RWMODE1:0
875June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
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