Texas Instruments TM4C1294NCPDT - Page 36

Register 9: ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020 ........................................... 1099
Register 10: ADC Sample Phase Control (ADCSPC), offset 0x024 .................................................... 1101
Register 11: ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ............................... 1103
Register 12: ADC Sample Averaging Control (ADCSAC), offset 0x030 ............................................... 1105
Register 13: ADC Digital Comparator Interrupt Status and Clear (ADCDCISC), offset 0x034 ............... 1106
Register 14: ADC Control (ADCCTL), offset 0x038 ............................................................................ 1108
Register 15: ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040 ............. 1109
Register 16: ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044 ...................................... 1111
Register 17: ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048 .............................. 1118
Register 18: ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068 .............................. 1118
Register 19: ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088 .............................. 1118
Register 20: ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ............................. 1118
Register 21: ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C ........................... 1119
Register 22: ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C ........................... 1119
Register 23: ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset 0x08C .......................... 1119
Register 24: ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC .......................... 1119
Register 25: ADC Sample Sequence 0 Operation (ADCSSOP0), offset 0x050 .................................... 1121
Register 26: ADC Sample Sequence 0 Digital Comparator Select (ADCSSDC0), offset 0x054 ............. 1123
Register 27: ADC Sample Sequence Extended Input Multiplexer Select 0 (ADCSSEMUX0), offset
0x058 .......................................................................................................................... 1125
Register 28: ADC Sample Sequence 0 Sample and Hold Time (ADCSSTSH0), offset 0x05C .............. 1127
Register 29: ADC Sample Sequence Input Multiplexer Select 1 (ADCSSMUX1), offset 0x060 ............. 1129
Register 30: ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080 ............. 1129
Register 31: ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064 ...................................... 1130
Register 32: ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084 ...................................... 1130
Register 33: ADC Sample Sequence 1 Operation (ADCSSOP1), offset 0x070 .................................... 1134
Register 34: ADC Sample Sequence 2 Operation (ADCSSOP2), offset 0x090 ................................... 1134
Register 35: ADC Sample Sequence 1 Digital Comparator Select (ADCSSDC1), offset 0x074 ............. 1135
Register 36: ADC Sample Sequence 2 Digital Comparator Select (ADCSSDC2), offset 0x094 ............ 1135
Register 37: ADC Sample Sequence Extended Input Multiplexer Select 1 (ADCSSEMUX1), offset
0x078 .......................................................................................................................... 1137
Register 38: ADC Sample Sequence Extended Input Multiplexer Select 2 (ADCSSEMUX2), offset 0x098
.................................................................................................................................... 1137
Register 39: ADC Sample Sequence 1 Sample and Hold Time (ADCSSTSH1), offset 0x07C .............. 1139
Register 40: ADC Sample Sequence 2 Sample and Hold Time (ADCSSTSH2), offset 0x09C .............. 1139
Register 41: ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3), offset 0x0A0 ............. 1141
Register 42: ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4 ...................................... 1142
Register 43: ADC Sample Sequence 3 Operation (ADCSSOP3), offset 0x0B0 .................................... 1144
Register 44: ADC Sample Sequence 3 Digital Comparator Select (ADCSSDC3), offset 0x0B4 ............ 1145
Register 45: ADC Sample Sequence Extended Input Multiplexer Select 3 (ADCSSEMUX3), offset
0x0B8 ......................................................................................................................... 1146
Register 46: ADC Sample Sequence 3 Sample and Hold Time (ADCSSTSH3), offset 0x0BC .............. 1147
Register 47: ADC Digital Comparator Reset Initial Conditions (ADCDCRIC), offset 0xD00 ................... 1148
Register 48: ADC Digital Comparator Control 0 (ADCDCCTL0), offset 0xE00 ..................................... 1153
Register 49: ADC Digital Comparator Control 1 (ADCDCCTL1), offset 0xE04 ..................................... 1153
Register 50: ADC Digital Comparator Control 2 (ADCDCCTL2), offset 0xE08 ..................................... 1153
Register 51: ADC Digital Comparator Control 3 (ADCDCCTL3), offset 0xE0C .................................... 1153
Register 52: ADC Digital Comparator Control 4 (ADCDCCTL4), offset 0xE10 ..................................... 1153
Register 53: ADC Digital Comparator Control 5 (ADCDCCTL5), offset 0xE14 ..................................... 1153
June 18, 201436
Texas Instruments-Production Data
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