Texas Instruments AFE79 Series - 2.16.306 Register 483 h (offset = 483 h) [reset = 0 h]; 2.16.307 Register 484 h (offset = 484 h) [reset = 1 h]; 2.16.308 Register 487 h (offset = 487 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.16.306 Register 483h (offset = 483h) [reset = 0h]
Figure 2-2569. Register 483h
7 6 5 4 3 2 1 0
ACTIV_BIR_DIR_CTRL_GPIO_32 reserved
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2585. Register 483 Field Descriptions
Bit Field Type Reset Description
3-1
ACTIV_BIR_DIR_C
TRL_GPIO_32
R/W 0h
Control to indicate whether the GPIO_32 needs dynamic
ouptu t enabling.
0 to 3 --> Static direction
4 --> Use the IO for 3 pin SPI B2 SDIO.
5 --> Use the IO for 4 pin SPI B2 SDO
6 --> Use the IO for 3 pin SPI B1 SDIO.
7 --> use the IO for 4 pin SPI B1 SDO.
Unused as this is fixed IO
0-0 reserved R/W 0h
2.16.307 Register 484h (offset = 484h) [reset = 1h]
Figure 2-2570. Register 484h
7 6 5 4 3 2 1 0
reserved reserved BUF_DIR_CTRL_GPIO_33
R/W-0h R/W-0h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2586. Register 484 Field Descriptions
Bit Field Type Reset Description
7-5 reserved R/W 0h
4-2 reserved R/W 0h
1-0
BUF_DIR_CTRL_G
PIO_33
R/W 1h
Controls the direction of GPIO
0 both input and output are not selected.. can be used for
analog
1 input mode
2 output mode
3 shouldnt be used
2.16.308 Register 487h (offset = 487h) [reset = 0h]
Figure 2-2571. Register 487h
7 6 5 4 3 2 1 0
ACTIV_BIR_DIR_CTRL_GPIO_33 reserved
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset