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RX Top Register Map
805
SBAU337–May 2020
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Serial Interface Register Maps
Table 2-1740. Register 54F Field Descriptions
Bit Field Type Reset Description
1-0
RX_AGC_BAND0_
LNA_PHASE9[9:8]
R/W 0h
LNA Phase for Band0 for temp index 9 in case of External
LNA Control , Phase for DVGA Index 9 in case of External
DVGA control
2.13.316 Register 550h (offset = 550h) [reset = 0h]
Figure 2-1728. Register 550h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_PHASE10[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1741. Register 550 Field Descriptions
Bit Field Type Reset Description
7-0
RX_AGC_BAND0_
LNA_PHASE10[7:0
]
R/W 0h
LNA Phase for Band0 for temp index 10 in case of External
LNA Control , Phase for DVGA Index 10 in case of External
DVGA control
2.13.317 Register 551h (offset = 551h) [reset = 0h]
Figure 2-1729. Register 551h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_PHASE
10[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1742. Register 551 Field Descriptions
Bit Field Type Reset Description
1-0
RX_AGC_BAND0_
LNA_PHASE10[9:8
]
R/W 0h
LNA Phase for Band0 for temp index 10 in case of External
LNA Control , Phase for DVGA Index 10 in case of External
DVGA control
2.13.318 Register 552h (offset = 552h) [reset = 0h]
Figure 2-1730. Register 552h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_PHASE11[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1743. Register 552 Field Descriptions
Bit Field Type Reset Description
7-0
RX_AGC_BAND0_
LNA_PHASE11[7:0
]
R/W 0h
LNA Phase for Band0 for temp index 11 in case of External
LNA Control , Phase for DVGA Index 11 in case of External
DVGA control