JESD_SUBCHIP Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-45. Register 20 Field Descriptions (continued)
Bit Field Type Reset Description
1-0
SERDESAB_APB_
PAGE_ADDR_IND
EX
R/W 2h
page_address_index for SPI2APB bridge to access 16bit
address space in SerdesAB using 14b SPI interface
0 : 0000-3FFF
1 : 4000-7FFF
2 : 8000-BFFF
3 : C000-FFFF
2.3.2 Register 21h (offset = 21h) [reset = 12h]
Figure 2-43. Register 21h
7 6 5 4 3 2 1 0
SERDESCD_A
DDR_BIT13_FL
IP
SERDESCD_APB_MODE_16B SERDESCD_APB_PIN_INTF_E
N
SERDESCD_APB_PAGE_ADDR
_INDEX
R/W-0h R/W-1h R/W-0h R/W-2h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-46. Register 21 Field Descriptions
Bit Field Type Reset Description
6-6
SERDESCD_ADD
R_BIT13_FLIP
R/W 0h
Set this bit to flip the addr[13] of addr[15:0] of SerdesCD APB
bus
0 : flip
1 : no-flip
5-4
SERDESCD_APB_
MODE_16B
R/W 1h
Interface mode for SerdesCD
0 : 8b APB Intf
1 : 16b APB Intf
2 : 32b APB Intf
3-2
SERDESCD_APB_
PIN_INTF_EN
R/W 0h
set this bit to access SerdesCD APB interface through differnt
modes
0 : SPI2APB
1 : GPIO
2 : CM4 AHB
1-0
SERDESCD_APB_
PAGE_ADDR_IND
EX
R/W 2h
page_address_index for SPI2APB bridge to access 16bit
address space in SerdesCD using 14b SPI interface
0 : 0000-3FFF
1 : 4000-7FFF
2 : 8000-BFFF
3 : C000-FFFF
2.3.3 Register 24h (offset = 24h) [reset = FFh]
Figure 2-44. Register 24h
7 6 5 4 3 2 1 0
SERDESCD_RXBCLK_INV_ENA SERDESAB_RXBCLK_INV_ENA
R/W-Fh R/W-Fh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-47. Register 24 Field Descriptions
Bit Field Type Reset Description
7-4
SERDESCD_RXB
CLK_INV_ENA
R/W Fh
register to invert SerdesCD SRX5, SRX6, SRX7 and SRX8
rxbclks (0 -no inversion, 1 - invert)
[3] = SRX8 rxbclk invert
[2] = SRX7 rxbclk invert
[1] = SRX6 rxbclk invert
[0] = SRX5 rxbclk invert
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