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Texas Instruments AFE79 Series - 2.4.119 Register 96 h (offset = 96 h) [reset = 0 h]; 2.4.120 Register 97 h (offset = 97 h) [reset = 0 h]; 2.4.121 Register 98 h (offset = 98 h) [reset = 0 h]

Texas Instruments AFE79 Series
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DAC JESD Register Map
305
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.4.119 Register 96h (offset = 96h) [reset = 0h]
Figure 2-348. Register 96h
7 6 5 4 3 2 1 0
LANE3_F_COUNTER_ALL_LANES_READY[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-352. Register 96 Field Descriptions
Bit Field Type Reset Description
7-0
LANE3_F_COUNT
ER_ALL_LANES_
READY[7:0]
R 0h
JESDB: Measured rbd_counter value when all enabled lanes
are ready
JESDC: Measured rbd_counter value when all enabled lanes
are ready
2.4.120 Register 97h (offset = 97h) [reset = 0h]
Figure 2-349. Register 97h
7 6 5 4 3 2 1 0
LANE3_F_COUNTER_ALL_LANES_READY[15:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-353. Register 97 Field Descriptions
Bit Field Type Reset Description
7-0
LANE3_F_COUNT
ER_ALL_LANES_
READY[15:8]
R 0h
JESDB: Measured rbd_counter value when all enabled lanes
are ready
JESDC: Measured rbd_counter value when all enabled lanes
are ready
2.4.121 Register 98h (offset = 98h) [reset = 0h]
Figure 2-350. Register 98h
7 6 5 4 3 2 1 0
LINK1_SYSREF_CNT_ON_RELEASE_OPPORTUNITY LINK0_SYSREF_CNT_ON_RELEASE_OPPORTUNITY
R-0h R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

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