EasyManua.ls Logo

Texas Instruments AFE79 Series - 2.14.134 Register 4 A9 h (offset = 4 A9 h) [reset = 58 h]; 2.14.135 Register 4 AAh (offset = 4 AAh) [reset = Ch]; 2.14.136 Register 4 ACh (offset = 4 ACh) [reset = 40 h]

Texas Instruments AFE79 Series
1268 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
www.ti.com
FB Top Register Map
901
SBAU337May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.14.134 Register 4A9h (offset = 4A9h) [reset = 58h]
Figure 2-2017. Register 4A9h
7 6 5 4 3 2 1 0
FB_AGC_BLANK_TIME_FOR_EXT_COMP_CHANGE[15:8]
R/W-58h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2031. Register 4A9 Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BLANK_
TIME_FOR_EXT_
COMP_CHANGE[1
5:8]
R/W 58h
When Ext Component Gain Changes, this blanking time is
used for all the detectors
2.14.135 Register 4AAh (offset = 4AAh) [reset = Ch]
Figure 2-2018. Register 4AAh
7 6 5 4 3 2 1 0
FB_AGC_EXT_LNA_GAIN_MARGIN
R/W-Ch
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2032. Register 4AA Field Descriptions
Bit Field Type Reset Description
5-0
FB_AGC_EXT_LN
A_GAIN_MARGIN
R/W Ch
LNA gain margin to be used for reenabling the LNA. Provides
additional hysterisis on top of the attack and decay hysterisis.
Resolution in 0.5 dB
2.14.136 Register 4ACh (offset = 4ACh) [reset = 40h]
Figure 2-2019. Register 4ACh
7 6 5 4 3 2 1 0
FB_AGC_PIN_1_SELECT_BITS[7:0]
R/W-40h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2033. Register 4AC Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_PIN_1_S
ELECT_BITS[7:0]
R/W 40h
Each bit corresponds to one particular detector which should
be used for peak detector 1
Bit 14 --> Dig OVR Bit 13 -> Reserved Bit 12 --> Reserved Bit
11 --> LNARF det Bit 10 --> Reserved Bit 9 --> Reserved Bit 8
--> reserved Bit 7 --> Dig bigstep attack Bit 6 --> Dig small
step attack Bit 5 --> Bigstep decay Bit 4 --> Small step decay
Bit 3 --> Dig pwr attack Bit 2 --> Dig pwr decay Bit 1 -->
Absolute reliability Bit 0 --> Relative reliability

Table of Contents

Related product manuals