Texas Instruments AFE79 Series - 2.14.261 Register 56 Ch (offset = 56 Ch) [reset = 0 h]; 2.14.262 Register 56 Dh (offset = 56 Dh) [reset = 0 h]; 2.14.263 Register 56 Eh (offset = 56 Eh) [reset = 0 h]

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Serial Interface Register Maps
Table 2-2157. Register 56B Field Descriptions
Bit Field Type Reset Description
1-0
FB_AGC_BAND0_
LNA_PHASE23[9:8
]
R/W 0h
LNA Phase for Band0 for temp index 23 in case of External
LNA Control , Phase for DVGA Index 23 in case of External
DVGA control
2.14.261 Register 56Ch (offset = 56Ch) [reset = 0h]
Figure 2-2144. Register 56Ch
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE24[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2158. Register 56C Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE24[7:0
]
R/W 0h
LNA Phase for Band0 for temp index 24 in case of External
LNA Control , Phase for DVGA Index 24 in case of External
DVGA control
2.14.262 Register 56Dh (offset = 56Dh) [reset = 0h]
Figure 2-2145. Register 56Dh
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE2
4[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2159. Register 56D Field Descriptions
Bit Field Type Reset Description
1-0
FB_AGC_BAND0_
LNA_PHASE24[9:8
]
R/W 0h
LNA Phase for Band0 for temp index 24 in case of External
LNA Control , Phase for DVGA Index 24 in case of External
DVGA control
2.14.263 Register 56Eh (offset = 56Eh) [reset = 0h]
Figure 2-2146. Register 56Eh
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE25[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2160. Register 56E Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE25[7:0
]
R/W 0h
LNA Phase for Band0 for temp index 25 in case of External
LNA Control , Phase for DVGA Index 25 in case of External
DVGA control