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879
SBAU337–May 2020
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Serial Interface Register Maps
2.14.62 Register 18Ch (offset = 18Ch) [reset = 5h]
Figure 2-1945. Register 18Ch
7 6 5 4 3 2 1 0
FB_DDC_DIG_GAIN_INDEX
R/W-5h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1959. Register 18C Field Descriptions
Bit Field Type Reset Description
5-0
FB_DDC_DIG_GAI
N_INDEX
R/W 5h
Digital gain to be applied at the end of the FB DDC chain for
band0.
Meant for debug use. The internal AGC loop (if enabled) does
not see this gain.
Valid values are 0 through 47.
A value of G maps to a gain of (0.5G - 2.5) dB, yielding a
range from -2.5 dB to +21 dB in 0.5 dB steps.
2.14.63 Register 400h (offset = 400h) [reset = Ah]
Figure 2-1946. Register 400h
7 6 5 4 3 2 1 0
reserved reserved FB_AGC_PWR
_DECAY_EN
FB_AGC_PWR
_ATTACK_EN
FB_AGC_SMA
LL_STEP_DEC
AY_EN
FB_AGC_BIG_
STEP_DECAY
_EN
FB_AGC_SMA
LL_STEP_ATT
ACK_EN
FB_AGC_BIG_
STEP_ATTACK
_EN
R/W-0h R/W-0h R/W-0h R/W-0h R/W-1h R/W-0h R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1960. Register 400 Field Descriptions
Bit Field Type Reset Description
7-7 reserved R/W 0h
6-6 reserved R/W 0h
5-5
FB_AGC_PWR_D
ECAY_EN
R/W 0h
Use digital power decay detector for AGC control loop
0 : Disable
1 : Enable
4-4
FB_AGC_PWR_AT
TACK_EN
R/W 0h
Use digital power attack detector for AGC control loop
0 : Disable
1 : Enable
3-3
FB_AGC_SMALL_
STEP_DECAY_EN
R/W 1h
Use digital smallstep decay detector for AGC control loop
0 : Disable
1 : Enable
2-2
FB_AGC_BIG_STE
P_DECAY_EN
R/W 0h
Use digital bigstep decay detector for AGC control loop
0 : Disable
1 : Enable
1-1
FB_AGC_SMALL_
STEP_ATTACK_E
N
R/W 1h
Use digital smallstep attack detector for AGC control loop
0 : Disable
1 : Enable
0-0
FB_AGC_BIG_STE
P_ATTACK_EN
R/W 0h
Use digital bigstep attack detector for AGC control loop
0 : Disable
1 : Enable
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