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Texas Instruments AFE79 Series - 2.3.77 Register 94 h (offset = 94 h) [reset = 0 h]; 2.3.78 Register 95 h (offset = 95 h) [reset = 0 h]; 2.3.79 Register 97 h (offset = 97 h) [reset = 0 h]

Texas Instruments AFE79 Series
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JESD_SUBCHIP Register Map
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204
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
Table 2-120. Register 93 Field Descriptions
Bit Field Type Reset Description
7-0
LOAD_SLOW_CLK
_CNT_SEED_VAL[
15:8]
R/W 64h
Seed value to be loaded into the slow conter in clock
comparator
2.3.77 Register 94h (offset = 94h) [reset = 0h]
Figure 2-118. Register 94h
7 6 5 4 3 2 1 0
CFG_CLK_COMP_SLOW_CNT_OBS_SEL CFG_CLK_COMP_FAST_CNT_OBS_SEL
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-121. Register 94 Field Descriptions
Bit Field Type Reset Description
7-4
CFG_CLK_COMP_
SLOW_CNT_OBS_
SEL
R/W 0h
Select control for observing one of the bit in clock comparator
slow counter
3-0
CFG_CLK_COMP_
FAST_CNT_OBS_
SEL
R/W 0h
Select control for observing one of the bit in clock comparator
fast counter
2.3.78 Register 95h (offset = 95h) [reset = 0h]
Figure 2-119. Register 95h
7 6 5 4 3 2 1 0
CFG_CLK_CO
MPARATOR_I
NST_SEL
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-122. Register 95 Field Descriptions
Bit Field Type Reset Description
0-0
CFG_CLK_COMP
ARATOR_INST_S
EL
R/W 0h
Two clk comparator instances present. At a time only one can
be used. This bit is used to choose instance 0 or 1
0 : select inst0 clk-comparator
1 : select inst1 clk-comparator
2.3.79 Register 97h (offset = 97h) [reset = 0h]
Figure 2-120. Register 97h
7 6 5 4 3 2 1 0
CLK_OBS_DO
NE_INTR
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

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