Texas Instruments AFE79 Series - 2.3.113 Register C1 h (offset = C1 h) [reset = 1 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-156. Register C0 Field Descriptions
Bit Field Type Reset Description
7-7
APB_CLK_SYSRE
F_VAL
R/W 0h spi-based sysref
6-6
APB_CLK_SYSRE
F_SEL
R/W 0h select spi-based sysref which is apb_clk_sysref_val
5-4
APB_CLK_SYSRE
F_DELAY2
R/W 0h
UNUSED
0 : UNUSED
3-2
APB_CLK_SYSRE
F_DELAY
R/W 0h
UNUSED
0 : UNUSED
1-1
APB_CLK_DITHER
ED_MODE_EN
R/W 1h
set to 1 for dithering the clocks derieved from root-clk
0 : Disable clk dither
1 : Enable clk dither
0-0
APB_CLK_DISABL
E
R/W 0h
Disable apb_clk generation
0 : Enable
1 : Disable
2.3.113 Register C1h (offset = C1h) [reset = 1h]
Figure 2-154. Register C1h
7 6 5 4 3 2 1 0
APB_CLK_DIV
_FACTOR_LO
AD
APB_CLK_DIV
_FACTOR_OD
D
APB_CLK_DIV_FACTOR
R/W-0h R/W-0h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-157. Register C1 Field Descriptions
Bit Field Type Reset Description
7-7
APB_CLK_DIV_FA
CTOR_LOAD
R/W 0h
When dithering is enabled (setting cfg_dithered_mode_en=1),
the divide factor will dynamically change between N and N-1
(one lower than the above mentioned divide factors).
If apb_clk_div_factor = 1, and apb_clk_div_factor_odd=1/0,
the the divide ratio is (3,4)
If apb_clk_div_factor = 2, and apb_clk_div_factor_odd=1, the
the divide ratio is (4,5)
If apb_clk_div_factor = 2, and apb_clk_div_factor_odd=0, the
the divide ratio is (5,6)
If apb_clk_div_factor = 4, and apb_clk_div_factor_odd=1, the
the divide ratio is (6,7)
If apb_clk_div_factor = 4, and apb_clk_div_factor_odd=0, the
the divide ratio is (7,8)
If apb_clk_div_factor = 8, and apb_clk_div_factor_odd=1, the
the divide ratio is (8,9)
If apb_clk_div_factor = 8, and apb_clk_div_factor_odd=0, the
the divide ratio is (9,10)
If apb_clk_div_factor = 16, and apb_clk_div_factor_odd=1, the
the divide ratio is (10,11)
If apb_clk_div_factor = 16, and apb_clk_div_factor_odd=0, the
the divide ratio is (11,12)
If apb_clk_div_factor = 32, and apb_clk_div_factor_odd=1, the
the divide ratio is (12,13)
If apb_clk_div_factor = 32, and apb_clk_div_factor_odd=0, the
the divide ratio is (13,14)
If apb_clk_div_factor = 0, and apb_clk_div_factor_odd=1, the
the divide ratio is (14,15)
If apb_clk_div_factor = 0, and apb_clk_div_factor_odd=0, the
the divide ratio is (15,16)
If apb_clk_divide_factor = 0, and apb_clk_div_factor_odd=1,
the the divide ratio is 15