Texas Instruments AFE79 Series - 2.4.142 Register B6 h (offset = B6 h) [reset = 0 h]; 2.4.143 Register B7 h (offset = B7 h) [reset = 0 h]; 2.4.144 Register B8 h (offset = B8 h) [reset = 0 h]

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Serial Interface Register Maps
2.4.142 Register B6h (offset = B6h) [reset = 0h]
Figure 2-371. Register B6h
7 6 5 4 3 2 1 0
MUX_OVR_FO
R_DUC_CLK
MUX_SEL_FO
R_DUC_TXA_T
O_TXB_CLK
SHORTTEST_
ENA
R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-375. Register B6 Field Descriptions
Bit Field Type Reset Description
6-6
MUX_OVR_FOR_
DUC_CLK
R/W 0h TESTMODE
5-5
MUX_SEL_FOR_D
UC_TXA_TO_TXB
_CLK
R/W 0h TESTMODE
4-4 SHORTTEST_ENA R/W 0h
Turns on the JESD SHORT pattern test (5.1.6.2). Must
program octets in jesd_shorttest_patterns[0:15]
2.4.143 Register B7h (offset = B7h) [reset = 0h]
Figure 2-372. Register B7h
7 6 5 4 3 2 1 0
TX_JESD_RAMPTEST_INCR TX_JESD_TEST_SIG_GEN_MODE
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-376. Register B7 Field Descriptions
Bit Field Type Reset Description
7-4
TX_JESD_RAMPT
EST_INCR
R/W 0h increment value of ramp test pattern
2-0
TX_JESD_TEST_S
IG_GEN_MODE
R/W 0h
Enables test patterns
0 : normal data
1 : const test pattern
2 : ramp test pattern
4 : Alternate 10 pattern
2.4.144 Register B8h (offset = B8h) [reset = 0h]
Figure 2-373. Register B8h
7 6 5 4 3 2 1 0
JESD_SHORTTEST_INPUT0[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-377. Register B8 Field Descriptions
Bit Field Type Reset Description
7-0
JESD_SHORTTES
T_INPUT0[7:0]
R/W 0h short test pattern input