Texas Instruments AFE79 Series - 2.4.41 Register 48 h (offset = 48 h) [reset = 3 h]; 2.4.42 Register 49 h (offset = 49 h) [reset = 1 Fh]; 2.4.43 Register 4 Ah (offset = 4 Ah) [reset = 1 h]

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Serial Interface Register Maps
Table 2-273. Register 47 Field Descriptions
Bit Field Type Reset Description
7-7 LINK0_SCR R/W 0h Turns on the scrambler when asserted
4-0 LINK0_ILA_L_M1 R/W 1h
JESD L-1 configuration value used only for ILA checking; may
be set independently of the actual JESD mode
2.4.41 Register 48h (offset = 48h) [reset = 3h]
Figure 2-270. Register 48h
7 6 5 4 3 2 1 0
LINK0_ILA_F_M1
R/W-3h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-274. Register 48 Field Descriptions
Bit Field Type Reset Description
7-0 LINK0_ILA_F_M1 R/W 3h
JESD F-1 configuration value used only for ILA checking; may
be set independently of the actual JESD mode
2.4.42 Register 49h (offset = 49h) [reset = 1Fh]
Figure 2-271. Register 49h
7 6 5 4 3 2 1 0
LINK0_ILA_K_M1
R/W-1Fh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-275. Register 49 Field Descriptions
Bit Field Type Reset Description
7-0 LINK0_ILA_K_M1 R/W 1Fh
JESD K-1 configuration value used only for ILA checking; may
be set independently of the actual JESD mode
2.4.43 Register 4Ah (offset = 4Ah) [reset = 1h]
Figure 2-272. Register 4Ah
7 6 5 4 3 2 1 0
LINK0_ILA_M_M1
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-276. Register 4A Field Descriptions
Bit Field Type Reset Description
7-0 LINK0_ILA_M_M1 R/W 1h
JESD M-1 configuration value used only for ILA checking; may
be set independently of the actual JESD mode