IO Wrap Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.16.529 Register 9E8h (offset = 9E8h) [reset = 0h]
Figure 2-2792. Register 9E8h
7 6 5 4 3 2 1 0
SEL_INTPI_RX_GAIN_SW_1 POL_INTPI_RX
_GAIN_SW_1
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2808. Register 9E8 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RX_G
AIN_SW_1
R/W 0h
select control for intpi_rx_gain_sw_1. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RX_G
AIN_SW_1
R/W 0h
polarity control for intpi_rx_gain_sw_1. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.530 Register 9E9h (offset = 9E9h) [reset = 2h]
Figure 2-2793. Register 9E9h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RX_GAIN_S
W_1
OVR_INTPI_R
X_GAIN_SW_1
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2809. Register 9E9 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RX_GAIN_SW_1
R/W 1h
control to select whether the input function intpi_rx_gain_sw_1
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_RX_G
AIN_SW_1
R/W 0h override value for ovr_sel_intpi_rx_gain_sw_1 is made high
2.16.531 Register 9ECh (offset = 9ECh) [reset = 0h]
Figure 2-2794. Register 9ECh
7 6 5 4 3 2 1 0
SEL_INTPI_RX_GAIN_SW_2 POL_INTPI_RX
_GAIN_SW_2
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2810. Register 9EC Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RX_G
AIN_SW_2
R/W 0h
select control for intpi_rx_gain_sw_2. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RX_G
AIN_SW_2
R/W 0h
polarity control for intpi_rx_gain_sw_2. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
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