Texas Instruments AFE79 Series - 2.14.1 Register 40 h (offset = 40 h) [reset = 14 h]; 2.14.2 Register 41 h (offset = 41 h) [reset = 1 h]; 2.14.3 Register 44 h (offset = 44 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
2.14.1 Register 40h (offset = 40h) [reset = 14h]
Figure 2-1884. Register 40h
7 6 5 4 3 2 1 0
FB_DDC_MODE_CONFIG
R/W-14h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1898. Register 40 Field Descriptions
Bit Field Type Reset Description
4-0
FB_DDC_MODE_
CONFIG
R/W 14h
FB DDC Mode Configuration. Function of overall decimation
factor. This is automatically determined if System
Configuration Macros are used.
00: decimation factor = 2
02: decimation factor = 16
03: decimation factor = 32
04: decimation factor = 10
06: decimation factor = 20
07: decimation factor = 40
08: decimation factor = 12
10: decimation factor = 24
11: decimation factor = 48
16: decimation factor = 4
32: decimation factor = 2.5
48: decimation factor = 5
64: decimation factor = 3
80: decimation factor = 6
2.14.2 Register 41h (offset = 41h) [reset = 1h]
Figure 2-1885. Register 41h
7 6 5 4 3 2 1 0
FB_DDC_2X_S
CALE_CONFIG
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1899. Register 41 Field Descriptions
Bit Field Type Reset Description
0-0
FB_DDC_2X_SCA
LE_CONFIG
R/W 1h
FB DDC output 2x scaling control.
Recommended for optimal full-scale dynamic range utilization
for RF sampling systems.
0: Don't scale by 2
1: Do scale by 2 (default; recommended)
2.14.3 Register 44h (offset = 44h) [reset = 0h]
Figure 2-1886. Register 44h
7 6 5 4 3 2 1 0
FB_DDC_REA
L_MODE_CON
FIG
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset