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905
SBAU337–May 2020
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Serial Interface Register Maps
2.14.145 Register 4B5h (offset = 4B5h) [reset = 0h]
Figure 2-2028. Register 4B5h
7 6 5 4 3 2 1 0
FB_AGC_GAIN_CHG_PULSE_EXPN_COUNT[11:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2042. Register 4B5 Field Descriptions
Bit Field Type Reset Description
3-0
FB_AGC_GAIN_C
HG_PULSE_EXPN
_COUNT[11:8]
R/W 0h
Number of clock cycles (in terms of Fs/8) by which a high(one)
should be extended before being sent on the pins for gain
change indication pin.
2.14.146 Register 4B6h (offset = 4B6h) [reset = 1h]
Figure 2-2029. Register 4B6h
7 6 5 4 3 2 1 0
FB_AGC_PULSE_EXPANSION_COUNT[7:0]
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2043. Register 4B6 Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_PULSE_
EXPANSION_COU
NT[7:0]
R/W 1h
Number of clock cycles (in terms of Fs/8) by which a high(one)
should be extended before being sent on the pins.
2.14.147 Register 4B7h (offset = 4B7h) [reset = 0h]
Figure 2-2030. Register 4B7h
7 6 5 4 3 2 1 0
FB_AGC_PULSE_EXPANSION_COUNT[11:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2044. Register 4B7 Field Descriptions
Bit Field Type Reset Description
3-0
FB_AGC_PULSE_
EXPANSION_COU
NT[11:8]
R/W 0h
Number of clock cycles (in terms of Fs/8) by which a high(one)
should be extended before being sent on the pins.
2.14.148 Register 4B8h (offset = 4B8h) [reset = 0h]
Figure 2-2031. Register 4B8h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_TEMP_IDX
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset