Texas Instruments AFE79 Series - 2.16.550 Register A29 h (offset = A29 h) [reset = 2 h]; 2.16.551 Register A2 Ch (offset = A2 Ch) [reset = 0 h]; 2.16.552 Register A2 Dh (offset = A2 Dh) [reset = 2 h]

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Serial Interface Register Maps
2.16.550 Register A29h (offset = A29h) [reset = 2h]
Figure 2-2813. Register A29h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_FB_NCOSE
L_3
OVR_INTPI_FB
_NCOSEL_3
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2829. Register A29 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
FB_NCOSEL_3
R/W 1h
control to select whether the input function intpi_fb_ncosel_3
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_FB_N
COSEL_3
R/W 0h override value for ovr_sel_intpi_fb_ncosel_3 is made high
2.16.551 Register A2Ch (offset = A2Ch) [reset = 0h]
Figure 2-2814. Register A2Ch
7 6 5 4 3 2 1 0
SEL_INTPI_RX_NCOSEL_0 POL_INTPI_RX
_NCOSEL_0
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2830. Register A2C Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RX_N
COSEL_0
R/W 0h
select control for intpi_rx_ncosel_0. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RX_N
COSEL_0
R/W 0h
polarity control for intpi_rx_ncosel_0. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
2.16.552 Register A2Dh (offset = A2Dh) [reset = 2h]
Figure 2-2815. Register A2Dh
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RX_NCOSE
L_0
OVR_INTPI_R
X_NCOSEL_0
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2831. Register A2D Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RX_NCOSEL_0
R/W 1h
control to select whether the input function intpi_rx_ncosel_0
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_RX_N
COSEL_0
R/W 0h override value for ovr_sel_intpi_rx_ncosel_0 is made high