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JESD_SUBCHIP Register Map
237
SBAU337–May 2020
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Serial Interface Register Maps
2.3.136 Register 15Bh (offset = 15Bh) [reset = 0h]
Figure 2-177. Register 15Bh
7 6 5 4 3 2 1 0
SERDESCD_PHY_READY_MASK SERDESCD_PHY_READY_CLEAR
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-180. Register 15B Field Descriptions
Bit Field Type Reset Description
7-4
SERDESCD_PHY_
READY_MASK
R/W 0h
register to mask SerdesCD SRX5, SRX6, SRX7, SRX8 PHY
READY indicator register bits
[3] = mask SRX8 PHY READY
[2] = mask SRX7 PHY READY
[1] = mask SRX6 PHY READY
[0] = mask SRX5 PHY READY
3-0
SERDESCD_PHY_
READY_CLEAR
R/W 0h
register to clear SerdesCD SRX5, SRX6, SRX7, SRX8 PHY
READY indicator register bits
[3] = clear SRX8 PHY READY
[2] = clear SRX7 PHY READY
[1] = clear SRX6 PHY READY
[0] = clear SRX5 PHY READY
2.3.137 Register 15Ch (offset = 15Ch) [reset = 0h]
Figure 2-178. Register 15Ch
7 6 5 4 3 2 1 0
SERDESCD_P
LL_LOSS_OF_
LOCK_MASK
SERDESCD_P
LL_LOSS_OF_
LOCK_CLEAR
SERDESAB_P
LL_LOSS_OF_
LOCK_MASK
SERDESAB_P
LL_LOSS_OF_
LOCK_CLEAR
R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-181. Register 15C Field Descriptions
Bit Field Type Reset Description
3-3
SERDESCD_PLL_
LOSS_OF_LOCK_
MASK
R/W 0h
register to mask SerdesCD PLL loss of lock indicator register
bits
2-2
SERDESCD_PLL_
LOSS_OF_LOCK_
CLEAR
R/W 0h
register to clear SerdesCD PLL loss of lock indicator register
bits
1-1
SERDESAB_PLL_
LOSS_OF_LOCK_
MASK
R/W 0h
register to mask SerdesAB PLL loss of lock indicator register
bits
0-0
SERDESAB_PLL_
LOSS_OF_LOCK_
CLEAR
R/W 0h
register to clear SerdesAB PLL loss of lock indicator register
bits
2.3.138 Register 15Dh (offset = 15Dh) [reset = 0h]
Figure 2-179. Register 15Dh
7 6 5 4 3 2 1 0
SERDESAB_PHY_READY SERDESAB_LOS_INDICATOR
R-0h R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
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