Texas Instruments AFE79 Series - 2.4.47 Register 4 Eh (offset = 4 Eh) [reset = 80 h]; 2.4.48 Register 4 Fh (offset = 4 Fh) [reset = 0 h]; 2.4.49 Register 50 h (offset = 50 h) [reset = 0 h]; 2.4.50 Register 51 h (offset = 51 h) [reset = FFh]

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SBAU337–May 2020
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Serial Interface Register Maps
2.4.47 Register 4Eh (offset = 4Eh) [reset = 80h]
Figure 2-276. Register 4Eh
7 6 5 4 3 2 1 0
LINK0_ILA_HD LINK0_CF
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-280. Register 4E Field Descriptions
Bit Field Type Reset Description
7-7 LINK0_ILA_HD R/W 1h
JESD HD configuration value used only for ILA checking; may
be set independently of the actual JESD mode
4-0 LINK0_CF R/W 0h Lane configuration
2.4.48 Register 4Fh (offset = 4Fh) [reset = 0h]
Figure 2-277. Register 4Fh
7 6 5 4 3 2 1 0
LINK0_RES1
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-281. Register 4F Field Descriptions
Bit Field Type Reset Description
7-0 LINK0_RES1 R/W 0h Lane configuration
2.4.49 Register 50h (offset = 50h) [reset = 0h]
Figure 2-278. Register 50h
7 6 5 4 3 2 1 0
LINK0_RES2
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-282. Register 50 Field Descriptions
Bit Field Type Reset Description
7-0 LINK0_RES2 R/W 0h Lane configuration
2.4.50 Register 51h (offset = 51h) [reset = FFh]
Figure 2-279. Register 51h
7 6 5 4 3 2 1 0
COMMA_ALIGN_DLY_THRESH
R/W-FFh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset