JESD_SUBCHIP Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.3.155 Register 172h (offset = 172h) [reset = 0h]
Figure 2-196. Register 172h
7 6 5 4 3 2 1 0
DBG_FBCD_AFIFO_SYSREF_SPACING DBG_FBAB_AFIFO_SYSREF_SPACING
R-0h R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-199. Register 172 Field Descriptions
Bit Field Type Reset Description
7-4
DBG_FBCD_AFIF
O_SYSREF_SPAC
ING
R 0h
Debug:
For async fifo sysref spacing
3-0
DBG_FBAB_AFIF
O_SYSREF_SPAC
ING
R 0h
Debug:
For async fifo sysref spacing
2.3.156 Register 174h (offset = 174h) [reset = 0h]
Figure 2-197. Register 174h
7 6 5 4 3 2 1 0
DBG_RXB_AFI
FO_RD_CLK_T
OGGLE_STICK
Y
DBG_RXB_AFI
FO_WR_CLK_
TOGGLE_STIC
KY
DBG_RXB_AFI
FO_SYS_REF_
RD_STICKY
DBG_RXB_AFI
FO_SYS_REF_
WR_STICKY
DBG_RXA_AFI
FO_RD_CLK_T
OGGLE_STICK
Y
DBG_RXA_AFI
FO_WR_CLK_
TOGGLE_STIC
KY
DBG_RXA_AFI
FO_SYS_REF_
RD_STICKY
DBG_RXA_AFI
FO_SYS_REF_
WR_STICKY
R-0h R-0h R-0h R-0h R-0h R-0h R-0h R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-200. Register 174 Field Descriptions
Bit Field Type Reset Description
7-7
DBG_RXB_AFIFO
_RD_CLK_TOGGL
E_STICKY
R 0h RXB to JESD Async FIFO rd-clk monitor
6-6
DBG_RXB_AFIFO
_WR_CLK_TOGGL
E_STICKY
R 0h RXB to JESD Async FIFO wr-clk monitor
5-5
DBG_RXB_AFIFO
_SYS_REF_RD_S
TICKY
R 0h RXB to JESD Async FIFO rd-sysref monitor
4-4
DBG_RXB_AFIFO
_SYS_REF_WR_S
TICKY
R 0h RXB to JESD Async FIFO wr-sysref monitor
3-3
DBG_RXA_AFIFO
_RD_CLK_TOGGL
E_STICKY
R 0h RXA to JESD Async FIFO rd-clk monitor
2-2
DBG_RXA_AFIFO
_WR_CLK_TOGGL
E_STICKY
R 0h RXA to JESD Async FIFO wr-clk monitor
1-1
DBG_RXA_AFIFO
_SYS_REF_RD_S
TICKY
R 0h RXA to JESD Async FIFO rd-sysref monitor
0-0
DBG_RXA_AFIFO
_SYS_REF_WR_S
TICKY
R 0h RXA to JESD Async FIFO wr-sysref monitor
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