SERDES Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-736. Register 4016 Field Descriptions
Bit Field Type Reset Description
6-0
HF_CNTR_THRES
H
R/W 15h
Highfreq_threshold for high frequency pattern test threshold in
S7.6 format.
2.6.17 Register 4017h (offset = 4017h) [reset = 3Dh]
Figure 2-731. Register 4017h
7 6 5 4 3 2 1 0
LF_CNTR_THRESH
R/W-3Dh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-737. Register 4017 Field Descriptions
Bit Field Type Reset Description
6-0
LF_CNTR_THRES
H
R/W 3Dh Overflow_threshold for overflow threshold in S7.6 format.
2.6.18 Register 4018h (offset = 4018h) [reset = 0h]
Figure 2-732. Register 4018h
7 6 5 4 3 2 1 0
LF_CNTR_TARGET_MSB[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-738. Register 4018 Field Descriptions
Bit Field Type Reset Description
7-0
LF_CNTR_TARGE
T_MSB[7:0]
R/W 0h Low frequency component counter, MSB
2.6.19 Register 4019h (offset = 4019h) [reset = 80h]
Figure 2-733. Register 4019h
7 6 5 4 3 2 1 0
LF_CNTR_TARGET_MSB[15:8]
R/W-80h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-739. Register 4019 Field Descriptions
Bit Field Type Reset Description
7-0
LF_CNTR_TARGE
T_MSB[15:8]
R/W 80h Low frequency component counter, MSB