Texas Instruments AFE79 Series - 2.3.56 Register 68 h (offset = 68 h) [reset = 10 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-99. Register 61 Field Descriptions
Bit Field Type Reset Description
6-4
MUX_SEL_FOR_T
XD_CTRL
R/W 3h
Selects the OP_SAMP_MODE, 12B MODE and ALARMS that
are to be routed to jesd TXD
0 : sel from 2T0_TXA
1 : sel from 2T0_TXB
2 : sel from 2T0_TXC
3 : sel from 2T0_TXD
4 : sel from 2T1_TXA
5 : sel from 2T1_TXB
6 : sel from 2T1_TXC
7 : sel from 2T1_TXD
Using LATTE to configure this register is recommended.
2-0
MUX_SEL_FOR_T
XC_CTRL
R/W 2h
Selects the OP_SAMP_MODE, 12B MODE and ALARMS that
are to be routed to jesd TXC
0 : sel from 2T0_TXA
1 : sel from 2T0_TXB
2 : sel from 2T0_TXC
3 : sel from 2T0_TXD
4 : sel from 2T1_TXA
5 : sel from 2T1_TXB
6 : sel from 2T1_TXC
7 : sel from 2T1_TXD
Using LATTE to configure this register is recommended.
2.3.56 Register 68h (offset = 68h) [reset = 10h]
Figure 2-97. Register 68h
7 6 5 4 3 2 1 0
RXOCTETPATH1_SEL RXOCTETPATH0_SEL
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-100. Register 68 Field Descriptions
Bit Field Type Reset Description
6-4
RXOCTETPATH1_
SEL
R/W 1h
Selects the input SERDES-Rx lane for data that is normally
supposed to be on SRX2.
0 : sel lane0 data
1 : sel lane1 data
2 : sel lane2 data
3 : sel lane3 data
4 : sel lane4 data
5 : sel lane5 data
6 : sel lane6 data
7 : sel lane7 data
2-0
RXOCTETPATH0_
SEL
R/W 0h
Selects the input SERDES-Rx lane for data that is normally
supposed to be on SRX1.
0 : sel lane0 data
1 : sel lane1 data
2 : sel lane2 data
3 : sel lane3 data
4 : sel lane4 data
5 : sel lane5 data
6 : sel lane6 data
7 : sel lane7 data