IO Wrap Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.16.446 Register 859h (offset = 859h) [reset = 2h]
Figure 2-2709. Register 859h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXA_DSA_
GAIN_0
OVR_INTPI_R
XA_DSA_GAIN
_0
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2725. Register 859 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXA_DSA_GAIN_0
R/W 1h
control to select whether the input function
intpi_rxa_dsa_gain_0 needs to be overriden ot not. 1 indicates
override.
0-0
OVR_INTPI_RXA_
DSA_GAIN_0
R/W 0h override value for ovr_sel_intpi_rxa_dsa_gain_0 is made high
2.16.447 Register 85Ch (offset = 85Ch) [reset = 0h]
Figure 2-2710. Register 85Ch
7 6 5 4 3 2 1 0
SEL_INTPI_RXA_DSA_GAIN_1 POL_INTPI_RX
A_DSA_GAIN_
1
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2726. Register 85C Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RXA_
DSA_GAIN_1
R/W 0h
select control for intpi_rxa_dsa_gain_1. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RXA_
DSA_GAIN_1
R/W 0h
polarity control for intpi_rxa_dsa_gain_1. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.448 Register 85Dh (offset = 85Dh) [reset = 2h]
Figure 2-2711. Register 85Dh
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXA_DSA_
GAIN_1
OVR_INTPI_R
XA_DSA_GAIN
_1
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2727. Register 85D Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXA_DSA_GAIN_1
R/W 1h
control to select whether the input function
intpi_rxa_dsa_gain_1 needs to be overriden ot not. 1 indicates
override.
0-0
OVR_INTPI_RXA_
DSA_GAIN_1
R/W 0h override value for ovr_sel_intpi_rxa_dsa_gain_1 is made high
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