Texas Instruments AFE79 Series User Manual

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-2206. Register 642 Field Descriptions
Bit Field Type Reset Description
5-0
FB_ALC_INPUT_D
ELAY_CODE
R/W 8h
Delay in number of clock cycles of fs/4 used to de-skew the
ALC input to counter skew
2.14.310 Register 644h (offset = 644h) [reset = 0h]
Figure 2-2193. Register 644h
7 6 5 4 3 2 1 0
FB_ALC_EXP_
OFFSET_INPU
T_ALC_FORC
E
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2207. Register 644 Field Descriptions
Bit Field Type Reset Description
0-0
FB_ALC_EXP_OF
FSET_INPUT_ALC
_FORCE
R/W 0h
Used in Input ALC mode
0 : Automatic computation
1 : Use the force value for exponent
2.14.311 Register 645h (offset = 645h) [reset = 0h]
Figure 2-2194. Register 645h
7 6 5 4 3 2 1 0
FB_ALC_EXP_OFFSET_INPUT_ALC_FORCE_VAL
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2208. Register 645 Field Descriptions
Bit Field Type Reset Description
4-0
FB_ALC_EXP_OF
FSET_INPUT_ALC
_FORCE_VAL
R/W 0h
2.14.312 Register 648h (offset = 648h) [reset = 0h]
Figure 2-2195. Register 648h
7 6 5 4 3 2 1 0
FB_ALC_MIN_ATTN_DSA
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2209. Register 648 Field Descriptions
Bit Field Type Reset Description
5-0
FB_ALC_MIN_ATT
N_DSA
R/W 0h
DSA min attenuation. DGC will compensate for gain changes
over and above this value only. 0.5 dB step size

Texas Instruments AFE79 Series Specifications

General

Brand	Texas Instruments
Model	AFE79 Series
Category	Control Unit
Language	English