Texas Instruments AFE79 Series - 2.4.180 Register ECh (offset = ECh) [reset = 0 h]; 2.4.181 Register EDh (offset = EDh) [reset = 0 h]; 2.4.182 Register EEh (offset = EEh) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-412. Register EB Field Descriptions (continued)
Bit Field Type Reset Description
3-0
CLEAR_JESD_CL
K_FLAG
R/W 0h clear jesd_rx_clk monitor flag
2.4.180 Register ECh (offset = ECh) [reset = 0h]
Figure 2-409. Register ECh
7 6 5 4 3 2 1 0
CLEAR_JESD_SYSREF_DIV2_FLAG CLEAR_JESD_CLK_DIV2_FLAG
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-413. Register EC Field Descriptions
Bit Field Type Reset Description
7-4
CLEAR_JESD_SY
SREF_DIV2_FLAG
R/W 0h clear jesd_rx_div2_sysref monitor flag
3-0
CLEAR_JESD_CL
K_DIV2_FLAG
R/W 0h clear jesd_rx_div2_clk monitor flag
2.4.181 Register EDh (offset = EDh) [reset = 0h]
Figure 2-410. Register EDh
7 6 5 4 3 2 1 0
CLEAR_DUC_SYSREF_FLAG CLEAR_DUC_CLK_FLAG
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-414. Register ED Field Descriptions
Bit Field Type Reset Description
7-4
CLEAR_DUC_SYS
REF_FLAG
R/W 0h clear duc_wr_sysref monitor flag
3-0
CLEAR_DUC_CLK
_FLAG
R/W 0h clear duc_wr_clk monitor flag
2.4.182 Register EEh (offset = EEh) [reset = 0h]
Figure 2-411. Register EEh
7 6 5 4 3 2 1 0
EMB_ALIGN_LOCK_FLAG COMMA_ALIGN_LOCK_FLAG
R-0h R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-415. Register EE Field Descriptions
Bit Field Type Reset Description
7-4
EMB_ALIGN_LOC
K_FLAG
R 0h
JESDC:emb_align_lock_lane[0:3]/[4:7]_monitor_flag
JESDB: UNUSED
3-0
COMMA_ALIGN_L
OCK_FLAG
R 0h
JESDB:comma_align_lock_lane[0:3]/[4:7]_monitor_flag
JESDC:sync_header_align_lock_lane[0:3]/[4:7]_monitor_flag