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Texas Instruments AFE79 Series - 2.11.5 Register 104 h (offset = 104 h) [reset = 0 h]; 2.11.6 Register 105 h (offset = 105 h) [reset = 0 h]; 2.11.7 Register 106 h (offset = 106 h) [reset = 0 h]

Texas Instruments AFE79 Series
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Digital Top Register Map
617
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
Table 2-1190. Register 103 Field Descriptions
Bit Field Type Reset Description
7-0
ALARM_MASK_M
SB_FOR_ALARM0
[15:8]
R/W 80h
Mask bits for alarm condition of MSB(last-16 )alarm condtions.
A high value at a bit position indicates the corresponding
alarm condition is not used in the final alarm generation.
There are two alarms (0,1) and this one correspond to alarm0.
Bit8 to Bit15 -> 0.
2.11.5 Register 104h (offset = 104h) [reset = 0h]
Figure 2-1180. Register 104h
7 6 5 4 3 2 1 0
ALARM_MASK_LSB_FOR_ALARM1[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1191. Register 104 Field Descriptions
Bit Field Type Reset Description
7-0
ALARM_MASK_LS
B_FOR_ALARM1[7
:0]
R/W 0h
Mask bits for alarm condition of LSB(first 16) alarm condtions.
A high value at a bit position indicates the corresponding
alarm condition is not used in the final alarm generation.
There are two alarms (0,1) and this one correspond to alarm1.
Bit0 -> Jesd subchip alarm.
Bit1 -> tx1_pap_alarm_out[0].
Bit2 -> tx2_pap_alarm_out[0].
Bit3 -> tx1_pap_alarm_out[1].
Bit4 -> tx2_pap_alarm_out[1].
Bit5 -> spi_alarm_out.
Bit6,Bit7 -> 0.
2.11.6 Register 105h (offset = 105h) [reset = 0h]
Figure 2-1181. Register 105h
7 6 5 4 3 2 1 0
ALARM_MASK_LSB_FOR_ALARM1[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1192. Register 105 Field Descriptions
Bit Field Type Reset Description
7-0
ALARM_MASK_LS
B_FOR_ALARM1[1
5:8]
R/W 0h
Mask bits for alarm condition of LSB(first 16) alarm condtions.
A high value at a bit position indicates the corresponding
alarm condition is not used in the final alarm generation.
There are two alarms (0,1) and this one correspond to alarm1.
Bit8 -> 0.
Bit9 -gt; PLL lock alarm.
Bit10 to Bit15 -> 0.
2.11.7 Register 106h (offset = 106h) [reset = 0h]
Figure 2-1182. Register 106h
7 6 5 4 3 2 1 0
ALARM_MASK_MSB_FOR_ALARM1[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

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