EasyManua.ls Logo

Texas Instruments AFE79 Series - 2.4.116 Register 93 h (offset = 93 h) [reset = 0 h]; 2.4.117 Register 94 h (offset = 94 h) [reset = 0 h]; 2.4.118 Register 95 h (offset = 95 h) [reset = 0 h]

Texas Instruments AFE79 Series
1268 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
DAC JESD Register Map
www.ti.com
304
SBAU337May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.4.116 Register 93h (offset = 93h) [reset = 0h]
Figure 2-345. Register 93h
7 6 5 4 3 2 1 0
LANE1_F_COUNTER_ALL_LANES_READY[15:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-349. Register 93 Field Descriptions
Bit Field Type Reset Description
7-0
LANE1_F_COUNT
ER_ALL_LANES_
READY[15:8]
R 0h
JESDB: Measured rbd_counter value when all enabled lanes
are ready
JESDC: Measured rbd_counter value when all enabled lanes
are ready
2.4.117 Register 94h (offset = 94h) [reset = 0h]
Figure 2-346. Register 94h
7 6 5 4 3 2 1 0
LANE2_F_COUNTER_ALL_LANES_READY[7:0]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-350. Register 94 Field Descriptions
Bit Field Type Reset Description
7-0
LANE2_F_COUNT
ER_ALL_LANES_
READY[7:0]
R 0h
JESDB: Measured rbd_counter value when all enabled lanes
are ready
JESDC: Measured rbd_counter value when all enabled lanes
are ready
2.4.118 Register 95h (offset = 95h) [reset = 0h]
Figure 2-347. Register 95h
7 6 5 4 3 2 1 0
LANE2_F_COUNTER_ALL_LANES_READY[15:8]
R-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-351. Register 95 Field Descriptions
Bit Field Type Reset Description
7-0
LANE2_F_COUNT
ER_ALL_LANES_
READY[15:8]
R 0h
JESDB: Measured rbd_counter value when all enabled lanes
are ready
JESDC: Measured rbd_counter value when all enabled lanes
are ready

Table of Contents

Related product manuals