RX Top Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.13.305 Register 545h (offset = 545h) [reset = 0h]
Figure 2-1717. Register 545h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_PHASE
4[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1730. Register 545 Field Descriptions
Bit Field Type Reset Description
1-0
RX_AGC_BAND0_
LNA_PHASE4[9:8]
R/W 0h
LNA Phase for Band0 for temp index 4 in case of External
LNA Control , Phase for DVGA Index 4 in case of External
DVGA control
2.13.306 Register 546h (offset = 546h) [reset = 0h]
Figure 2-1718. Register 546h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_PHASE5[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1731. Register 546 Field Descriptions
Bit Field Type Reset Description
7-0
RX_AGC_BAND0_
LNA_PHASE5[7:0]
R/W 0h
LNA Phase for Band0 for temp index 5 in case of External
LNA Control , Phase for DVGA Index 5 in case of External
DVGA control
2.13.307 Register 547h (offset = 547h) [reset = 0h]
Figure 2-1719. Register 547h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_PHASE
5[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1732. Register 547 Field Descriptions
Bit Field Type Reset Description
1-0
RX_AGC_BAND0_
LNA_PHASE5[9:8]
R/W 0h
LNA Phase for Band0 for temp index 5 in case of External
LNA Control , Phase for DVGA Index 5 in case of External
DVGA control
2.13.308 Register 548h (offset = 548h) [reset = 0h]
Figure 2-1720. Register 548h
7 6 5 4 3 2 1 0
RX_AGC_BAND0_LNA_PHASE6[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset