Texas Instruments AFE79 Series - 2.5.56 Register 64 h (offset = 64 h) [reset = 0 h]; 2.5.57 Register 65 h (offset = 65 h) [reset = 0 h]; 2.5.58 Register 66 h (offset = 66 h) [reset = 0 h]

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Serial Interface Register Maps
Table 2-556. Register 63 Field Descriptions
Bit Field Type Reset Description
7-1 0 R/W 0h Must read or write 0
0-0
CFG_RX_LFSR_L
OAD
R/W 0h
when set to 1, CFG_RX_LFSR_SEED_VAL is used as seed
for all rx M/N dividers
2.5.56 Register 64h (offset = 64h) [reset = 0h]
Figure 2-552. Register 64h
7 6 5 4 3 2 1 0
CFG_FB_LFSR_SEED_VAL[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-557. Register 64 Field Descriptions
Bit Field Type Reset Description
7-0
CFG_FB_LFSR_S
EED_VAL[7:0]
R/W 0h
When cfg_fb_lfsr_load is 1, this spi value is used as LFSR
seed for all fb M/N dividers
2.5.57 Register 65h (offset = 65h) [reset = 0h]
Figure 2-553. Register 65h
7 6 5 4 3 2 1 0
CFG_FB_LFSR_SEED_VAL[15:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-558. Register 65 Field Descriptions
Bit Field Type Reset Description
7-0
CFG_FB_LFSR_S
EED_VAL[15:8]
R/W 0h
When cfg_fb_lfsr_load is 1, this spi value is used as LFSR
seed for all fb M/N dividers
2.5.58 Register 66h (offset = 66h) [reset = 0h]
Figure 2-554. Register 66h
7 6 5 4 3 2 1 0
CFG_FB_LFSR_SEED_VAL[23:16]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-559. Register 66 Field Descriptions
Bit Field Type Reset Description
7-0
CFG_FB_LFSR_S
EED_VAL[23:16]
R/W 0h
When cfg_fb_lfsr_load is 1, this spi value is used as LFSR
seed for all fb M/N dividers