Texas Instruments AFE79 Series - 2.15.54 Register C5 h (offset = C5 h) [reset = 3 h]; 2.15.55 Register C6 h (offset = C6 h) [reset = 0 h]; 2.15.56 Register C7 h (offset = C7 h) [reset = 0 h]

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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-2275. Register C4 Field Descriptions
Bit Field Type Reset Description
1-0
CH0_MSB_FBMUX
SEL
R/W 2h ch0 used for the fbcd in case of dual fbmode.
2.15.54 Register C5h (offset = C5h) [reset = 3h]
Figure 2-2261. Register C5h
7 6 5 4 3 2 1 0
CH1_MSB_FBMUXSEL
R/W-3h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2276. Register C5 Field Descriptions
Bit Field Type Reset Description
1-0
CH1_MSB_FBMUX
SEL
R/W 3h ch1 used for the fbcd in case of dual fbmode.
2.15.55 Register C6h (offset = C6h) [reset = 0h]
Figure 2-2262. Register C6h
7 6 5 4 3 2 1 0
OVERRIDE_FBMUXSEL
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2277. Register C6 Field Descriptions
Bit Field Type Reset Description
1-0
OVERRIDE_FBMU
XSEL
R/W 0h
Control bits which indicate which bits of the FbMuxSel are
forced. The value for the forced bits are picked from
override_val_fbmuxsel
2.15.56 Register C7h (offset = C7h) [reset = 0h]
Figure 2-2263. Register C7h
7 6 5 4 3 2 1 0
OVERRIDE_VAL_FBMUXSEL
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2278. Register C7 Field Descriptions
Bit Field Type Reset Description
5-0
OVERRIDE_VAL_
FBMUXSEL
R/W 0h
First 3-lsb bits for fbab next three for fbcd.
This is directly overriding the fbmuxsel going to each
channels.