DAC JESD Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-409. Register E8 Field Descriptions
Bit Field Type Reset Description
7-4
CLEAR_EMB_ALI
GN_LOCK_FLAG
R/W 0h
JESDC:clear emb_align_lock_lane[0:3]/[4:7]_monitor_flag
JESDB : UNUSED
3-0
CLEAR_COMMA_
ALIGN_LOCK_FLA
G
R/W 0h
JESDB:clear
comma_align_lock_lane[0:3]/lane[4:7]_monitor_flag
JESDC:clear
sync_header_align_lock_lane[0:3]/[4:7]_monitor_flag
2.4.177 Register E9h (offset = E9h) [reset = 0h]
Figure 2-406. Register E9h
7 6 5 4 3 2 1 0
CLEAR_SERDES_RXBCLK_FLAG CLEAR_VALID_DATA_OUT_FLAG
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-410. Register E9 Field Descriptions
Bit Field Type Reset Description
7-4
CLEAR_SERDES_
RXBCLK_FLAG
R/W 0h clear serdes_rxbclk_lane[0:3]_monitor_flag
3-0
CLEAR_VALID_DA
TA_OUT_FLAG
R/W 0h JESDB/C:clear valid_data_out_lane[0:3]/[4:7]_monitor_flag
2.4.178 Register EAh (offset = EAh) [reset = 0h]
Figure 2-407. Register EAh
7 6 5 4 3 2 1 0
CLEAR_TX_DAC_SYSREF_FLAG CLEAR_TX_DAC_CLK_FLAG
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-411. Register EA Field Descriptions
Bit Field Type Reset Description
7-4
CLEAR_TX_DAC_
SYSREF_FLAG
R/W 0h clear tx_dac_sysref monitor flag
3-0
CLEAR_TX_DAC_
CLK_FLAG
R/W 0h clear tx_dac_clk monitor flag
2.4.179 Register EBh (offset = EBh) [reset = 0h]
Figure 2-408. Register EBh
7 6 5 4 3 2 1 0
CLEAR_JESD_SYSREF_FLAG CLEAR_JESD_CLK_FLAG
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-412. Register EB Field Descriptions
Bit Field Type Reset Description
7-4
CLEAR_JESD_SY
SREF_FLAG
R/W 0h clear jesd_rx_sysref monitor flag