www.ti.com
DAC JESD Register Map
367
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
Table 2-493. Register 148 Field Descriptions
Bit Field Type Reset Description
7-4
MAPPER_SYNC_F
IFO_TX1_OFFSET
_S4TO2
R/W 8h TESTMODE
3-0
MAPPER_SYNC_F
IFO_TX1_OFFSET
_S4TO4
R/W 8h TESTMODE
2.4.261 Register 149h (offset = 149h) [reset = 48h]
Figure 2-490. Register 149h
7 6 5 4 3 2 1 0
MAPPER_SYNC_FIFO_TX1_OFFSET_S2TO2 MAPPER_SYNC_FIFO_TX1_OFFSET_S4TO1
R/W-4h R/W-8h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-494. Register 149 Field Descriptions
Bit Field Type Reset Description
7-4
MAPPER_SYNC_F
IFO_TX1_OFFSET
_S2TO2
R/W 4h TESTMODE
3-0
MAPPER_SYNC_F
IFO_TX1_OFFSET
_S4TO1
R/W 8h TESTMODE
2.4.262 Register 14Ah (offset = 14Ah) [reset = 24h]
Figure 2-491. Register 14Ah
7 6 5 4 3 2 1 0
MAPPER_SYNC_FIFO_TX1_OFFSET_S1TO1 MAPPER_SYNC_FIFO_TX1_OFFSET_S2TO1
R/W-2h R/W-4h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-495. Register 14A Field Descriptions
Bit Field Type Reset Description
7-4
MAPPER_SYNC_F
IFO_TX1_OFFSET
_S1TO1
R/W 2h TESTMODE
3-0
MAPPER_SYNC_F
IFO_TX1_OFFSET
_S2TO1
R/W 4h TESTMODE
2.4.263 Register 14Ch (offset = 14Ch) [reset = 88h]
Figure 2-492. Register 14Ch
7 6 5 4 3 2 1 0
MAPPER_SYNC_FIFO_TX2_OFFSET_S4TO2 MAPPER_SYNC_FIFO_TX2_OFFSET_S4TO4
R/W-8h R/W-8h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset