Texas Instruments AFE79 Series - 2.16.517 Register 9 D0 h (offset = 9 D0 h) [reset = 0 h]; 2.16.518 Register 9 D1 h (offset = 9 D1 h) [reset = 2 h]; 2.16.519 Register 9 D4 h (offset = 9 D4 h) [reset = 0 h]

IO Wrap Register Map www.ti.com
1170
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.16.517 Register 9D0h (offset = 9D0h) [reset = 0h]
Figure 2-2780. Register 9D0h
7 6 5 4 3 2 1 0
SEL_INTPI_FBCD_AGC_PIN_F
REEZE
POL_INTPI_FB
CD_AGC_PIN_
FREEZE
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2796. Register 9D0 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_FBCD
_AGC_PIN_FREEZ
E
R/W 0h
select control for intpi_fbcd_agc_pin_freeze. 0 indicates take
from parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_FBCD
_AGC_PIN_FREEZ
E
R/W 0h
polarity control for intpi_fbcd_agc_pin_freeze. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.518 Register 9D1h (offset = 9D1h) [reset = 2h]
Figure 2-2781. Register 9D1h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_FBCD_AGC
_PIN_FREEZE
OVR_INTPI_FB
CD_AGC_PIN_
FREEZE
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2797. Register 9D1 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
FBCD_AGC_PIN_
FREEZE
R/W 1h
control to select whether the input function
intpi_fbcd_agc_pin_freeze needs to be overriden ot not. 1
indicates override.
0-0
OVR_INTPI_FBCD
_AGC_PIN_FREEZ
E
R/W 0h
override value for ovr_sel_intpi_fbcd_agc_pin_freeze is made
high
2.16.519 Register 9D4h (offset = 9D4h) [reset = 0h]
Figure 2-2782. Register 9D4h
7 6 5 4 3 2 1 0
SEL_INTPI_TDD_EN_RXA POL_INTPI_TD
D_EN_RXA
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2798. Register 9D4 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_TDD_
EN_RXA
R/W 0h
select control for intpi_tdd_en_rxa. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_TDD_
EN_RXA
R/W 0h
polarity control for intpi_tdd_en_rxa. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal