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Texas Instruments AFE79 Series - 2.3.91 Register A5 h (offset = A5 h) [reset = ABh]; 2.3.92 Register A6 h (offset = A6 h) [reset = CDh]; 2.3.93 Register A7 h (offset = A7 h) [reset = EFh]

Texas Instruments AFE79 Series
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JESD_SUBCHIP Register Map
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210
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
Table 2-134. Register A4 Field Descriptions
Bit Field Type Reset Description
5-0
RX_CLK_DIV_VAL
_ACC_THRESH
R/W 10h Accumulator threshold, while running dithered mode
2.3.91 Register A5h (offset = A5h) [reset = ABh]
Figure 2-132. Register A5h
7 6 5 4 3 2 1 0
RX_CLK_LFSR_SEED_VAL[7:0]
R/W-ABh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-135. Register A5 Field Descriptions
Bit Field Type Reset Description
7-0
RX_CLK_LFSR_S
EED_VAL[7:0]
R/W ABh
lfsr seed value. Need to be used along with
'rx_clk_lfsr_seed_load' register
2.3.92 Register A6h (offset = A6h) [reset = CDh]
Figure 2-133. Register A6h
7 6 5 4 3 2 1 0
RX_CLK_LFSR_SEED_VAL[15:8]
R/W-CDh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-136. Register A6 Field Descriptions
Bit Field Type Reset Description
7-0
RX_CLK_LFSR_S
EED_VAL[15:8]
R/W CDh
lfsr seed value. Need to be used along with
'rx_clk_lfsr_seed_load' register
2.3.93 Register A7h (offset = A7h) [reset = EFh]
Figure 2-134. Register A7h
7 6 5 4 3 2 1 0
RX_CLK_LFSR_SEED_VAL[23:16]
R/W-EFh
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-137. Register A7 Field Descriptions
Bit Field Type Reset Description
7-0
RX_CLK_LFSR_S
EED_VAL[23:16]
R/W EFh
lfsr seed value. Need to be used along with
'rx_clk_lfsr_seed_load' register

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