Texas Instruments AFE79 Series - 2.14.215 Register 53 Eh (offset = 53 Eh) [reset = 0 h]; 2.14.216 Register 53 Fh (offset = 53 Fh) [reset = 0 h]; 2.14.217 Register 540 h (offset = 540 h) [reset = 0 h]; 2.14.218 Register 541 h (offset = 541 h) [reset = 0 h]

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Serial Interface Register Maps
2.14.215 Register 53Eh (offset = 53Eh) [reset = 0h]
Figure 2-2098. Register 53Eh
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE1[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2112. Register 53E Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE1[7:0]
R/W 0h
LNA Phase for Band0 for temp index 1 in case of External
LNA Control , Phase for DVGA Index 1 in case of External
DVGA control
2.14.216 Register 53Fh (offset = 53Fh) [reset = 0h]
Figure 2-2099. Register 53Fh
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE1
[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2113. Register 53F Field Descriptions
Bit Field Type Reset Description
1-0
FB_AGC_BAND0_
LNA_PHASE1[9:8]
R/W 0h
LNA Phase for Band0 for temp index 1 in case of External
LNA Control , Phase for DVGA Index 1 in case of External
DVGA control
2.14.217 Register 540h (offset = 540h) [reset = 0h]
Figure 2-2100. Register 540h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE2[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2114. Register 540 Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE2[7:0]
R/W 0h
LNA Phase for Band0 for temp index 2 in case of External
LNA Control , Phase for DVGA Index 2 in case of External
DVGA control
2.14.218 Register 541h (offset = 541h) [reset = 0h]
Figure 2-2101. Register 541h
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE2
[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset