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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-1349. Register 53B Field Descriptions
Bit Field Type Reset Description
3-0
TX_PAP_CHAIN_D
ELAY_RAMP_UP[1
1:8]
R/W 0h
Tx chain latency before ramp up starts after no PAP triggers
are detected and after wait is done in PAP state machine. The
latency is measured in terms of clock frequency of FDAC/16.
2.12.135 Register 53Ch (offset = 53Ch) [reset = 80h]
Figure 2-1338. Register 53Ch
7 6 5 4 3 2 1 0
TX_PAP_GAIN_START_COS
R/W-80h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1350. Register 53C Field Descriptions
Bit Field Type Reset Description
7-0
TX_PAP_GAIN_ST
ART_COS
R/W 80h
Starting amplitude values for ramp up during PAP cosine ramp
up mode. Ranges of allowed values is 0 to 128. In the cosine
mode, value of 0 will get converted to amplitude of 127/128 in
the ramp up and value of 128 will map to amplitude of 0.
2.12.136 Register 53Eh (offset = 53Eh) [reset = 0h]
Figure 2-1339. Register 53Eh
7 6 5 4 3 2 1 0
TX_PAP_GAIN_START_LIN
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1351. Register 53E Field Descriptions
Bit Field Type Reset Description
7-0
TX_PAP_GAIN_ST
ART_LIN
R/W 0h
Starting values for ramp up during PAP linear ramp up mode.
Ranges of allowed values is 128 to 0. The conversion to
amplitude is programmed_value/128.
2.12.137 Register 540h (offset = 540h) [reset = 1h]
Figure 2-1340. Register 540h
7 6 5 4 3 2 1 0
TX_PAP_GAIN_STEP_SIZE
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1352. Register 540 Field Descriptions
Bit Field Type Reset Description
6-0
TX_PAP_GAIN_ST
EP_SIZE
R/W 1h
Ramp up step size ranges from 1 to 127 in both cosine and
linear ramp up modes.
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