www.ti.com
RX Top Register Map
711
SBAU337–May 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.13.1 Register 40h (offset = 40h) [reset = 8h]
Figure 2-1413. Register 40h
7 6 5 4 3 2 1 0
RX_DDC_MODE_CONFIG
R/W-8h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1426. Register 40 Field Descriptions
Bit Field Type Reset Description
6-0
RX_DDC_MODE_
CONFIG
R/W 8h
RX DDC Mode Configuration. Function of overall decimation
factor. This is automatically determined if System
Configuration Macros are used.
00: decimation factor = 2 or 8, depending on
rx_ddc_bw_config (see below)
02: decimation factor = 16
03: decimation factor = 32
04: decimation factor = 10
06: decimation factor = 20
07: decimation factor = 40
08: decimation factor = 12
10: decimation factor = 24
11: decimation factor = 48
16: decimation factor = 4
32: decimation factor = 2.5
48: decimation factor = 5
64: decimation factor = 3
80: decimation factor = 6
2.13.2 Register 41h (offset = 41h) [reset = 1h]
Figure 2-1414. Register 41h
7 6 5 4 3 2 1 0
RX_DDC_2X_S
CALE_CONFG
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-1427. Register 41 Field Descriptions
Bit Field Type Reset Description
0-0
RX_DDC_2X_SCA
LE_CONFG
R/W 1h
RX DDC output 2x scaling control.
Recommended for optimal full-scale dynamic range utilization
for RF sampling systems.
0: Don't scale by 2
1: Do scale by 2 (default; recommended)
0 : Do not scale by 2
1 : Do scale by 2
2.13.3 Register 42h (offset = 42h) [reset = 0h]
Figure 2-1415. Register 42h
7 6 5 4 3 2 1 0
RX_DDC_BAN
DS_CONFIG
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset