Texas Instruments AFE79 Series - 2.14.275 Register 57 Ah (offset = 57 Ah) [reset = 0 h]; 2.14.276 Register 57 Bh (offset = 57 Bh) [reset = 0 h]; 2.14.277 Register 5 BCh (offset = 5 BCh) [reset = 0 h]

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Serial Interface Register Maps
Table 2-2171. Register 579 Field Descriptions
Bit Field Type Reset Description
1-0
FB_AGC_BAND0_
LNA_PHASE30[9:8
]
R/W 0h
LNA Phase for Band0 for temp index 30 in case of External
LNA Control , Phase for DVGA Index 30 in case of External
DVGA control
2.14.275 Register 57Ah (offset = 57Ah) [reset = 0h]
Figure 2-2158. Register 57Ah
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE31[7:0]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2172. Register 57A Field Descriptions
Bit Field Type Reset Description
7-0
FB_AGC_BAND0_
LNA_PHASE31[7:0
]
R/W 0h
LNA Phase for Band0 for temp index 31 in case of External
LNA Control , Phase for DVGA Index 31 in case of External
DVGA control
2.14.276 Register 57Bh (offset = 57Bh) [reset = 0h]
Figure 2-2159. Register 57Bh
7 6 5 4 3 2 1 0
FB_AGC_BAND0_LNA_PHASE3
1[9:8]
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2173. Register 57B Field Descriptions
Bit Field Type Reset Description
1-0
FB_AGC_BAND0_
LNA_PHASE31[9:8
]
R/W 0h
LNA Phase for Band0 for temp index 31 in case of External
LNA Control , Phase for DVGA Index 31 in case of External
DVGA control
2.14.277 Register 5BCh (offset = 5BCh) [reset = 0h]
Figure 2-2160. Register 5BCh
7 6 5 4 3 2 1 0
FB_AGC_ENA
BLE_GPIO_RE
SET_FEATUR
E
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2174. Register 5BC Field Descriptions
Bit Field Type Reset Description
0-0
FB_AGC_ENABLE
_GPIO_RESET_FE
ATURE
R/W 0h
Enables Control of peak detector reset using GPIO. Used in
only External AGC Mode.
0 : Disable
1 : Enable