IO Wrap Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
2.16.523 Register 9DCh (offset = 9DCh) [reset = 0h]
Figure 2-2786. Register 9DCh
7 6 5 4 3 2 1 0
SEL_INTPI_TDD_EN_RXC POL_INTPI_TD
D_EN_RXC
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2802. Register 9DC Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_TDD_
EN_RXC
R/W 0h
select control for intpi_tdd_en_rxc. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_TDD_
EN_RXC
R/W 0h
polarity control for intpi_tdd_en_rxc. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
2.16.524 Register 9DDh (offset = 9DDh) [reset = 2h]
Figure 2-2787. Register 9DDh
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_TDD_EN_R
XC
OVR_INTPI_T
DD_EN_RXC
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2803. Register 9DD Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
TDD_EN_RXC
R/W 1h
control to select whether the input function intpi_tdd_en_rxc
needs to be overriden ot not. 1 indicates override.
0-0
OVR_INTPI_TDD_
EN_RXC
R/W 0h override value for ovr_sel_intpi_tdd_en_rxc is made high
2.16.525 Register 9E0h (offset = 9E0h) [reset = 0h]
Figure 2-2788. Register 9E0h
7 6 5 4 3 2 1 0
SEL_INTPI_TDD_EN_RXD POL_INTPI_TD
D_EN_RXD
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2804. Register 9E0 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_TDD_
EN_RXD
R/W 0h
select control for intpi_tdd_en_rxd. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_TDD_
EN_RXD
R/W 0h
polarity control for intpi_tdd_en_rxd. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
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