IO Wrap Register Map
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SBAU337–May 2020
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Serial Interface Register Maps
Table 2-2790. Register 95C Field Descriptions (continued)
Bit Field Type Reset Description
0-0
POL_INTPI_RXC_
AGC_PIN_FREEZ
E
R/W 0h
polarity control for intpi_rxc_agc_pin_freeze. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.512 Register 95Dh (offset = 95Dh) [reset = 2h]
Figure 2-2775. Register 95Dh
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXC_AGC_
PIN_FREEZE
OVR_INTPI_R
XC_AGC_PIN_
FREEZE
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2791. Register 95D Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPI_
RXC_AGC_PIN_F
REEZE
R/W 1h
control to select whether the input function
intpi_rxc_agc_pin_freeze needs to be overriden ot not. 1
indicates override.
0-0
OVR_INTPI_RXC_
AGC_PIN_FREEZ
E
R/W 0h
override value for ovr_sel_intpi_rxc_agc_pin_freeze is made
high
2.16.513 Register 960h (offset = 960h) [reset = 0h]
Figure 2-2776. Register 960h
7 6 5 4 3 2 1 0
SEL_INTPI_RXD_AGC_PIN_FR
EEZE
POL_INTPI_RX
D_AGC_PIN_F
REEZE
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2792. Register 960 Field Descriptions
Bit Field Type Reset Description
2-1
SEL_INTPI_RXD_
AGC_PIN_FREEZ
E
R/W 0h
select control for intpi_rxd_agc_pin_freeze. 0 indicates take
from parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
0-0
POL_INTPI_RXD_
AGC_PIN_FREEZ
E
R/W 0h
polarity control for intpi_rxd_agc_pin_freeze. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.514 Register 961h (offset = 961h) [reset = 2h]
Figure 2-2777. Register 961h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PI_RXD_AGC_
PIN_FREEZE
OVR_INTPI_R
XD_AGC_PIN_
FREEZE
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
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