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IO Wrap Register Map
1205
SBAU337–May 2020
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Serial Interface Register Maps
2.16.622 Register 11B0h (offset = 11B0h) [reset = 0h]
Figure 2-2885. Register 11B0h
7 6 5 4 3 2 1 0
POL_INTPO_F
BAB_PKDET_3
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2901. Register 11B0 Field Descriptions
Bit Field Type Reset Description
0-0
POL_INTPO_FBAB
_PKDET_3
R/W 0h
polarity control for intpo_fbab_pkdet_3. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.623 Register 11B1h (offset = 11B1h) [reset = 2h]
Figure 2-2886. Register 11B1h
7 6 5 4 3 2 1 0
OVR_SEL_INT
PO_FBAB_PK
DET_3
OVR_INTPO_F
BAB_PKDET_3
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2902. Register 11B1 Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPO_
FBAB_PKDET_3
R/W 1h
control to select whether the input function
intpo_fbab_pkdet_3 needs to be overriden ot not. 1 indicates
override.
0-0
OVR_INTPO_FBA
B_PKDET_3
R/W 0h
override value for intpo_fbab_pkdet_3 when
ovr_sel_intpo_fbab_pkdet_3 is made high
2.16.624 Register 11B4h (offset = 11B4h) [reset = 0h]
Figure 2-2887. Register 11B4h
7 6 5 4 3 2 1 0
POL_INTPO_F
BCD_PKDET_0
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2903. Register 11B4 Field Descriptions
Bit Field Type Reset Description
0-0
POL_INTPO_FBC
D_PKDET_0
R/W 0h
polarity control for intpo_fbcd_pkdet_0. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal