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IO Wrap Register Map
1207
SBAU337–May 2020
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Serial Interface Register Maps
2.16.628 Register 11BCh (offset = 11BCh) [reset = 0h]
Figure 2-2891. Register 11BCh
7 6 5 4 3 2 1 0
POL_INTPO_F
BCD_PKDET_2
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2907. Register 11BC Field Descriptions
Bit Field Type Reset Description
0-0
POL_INTPO_FBC
D_PKDET_2
R/W 0h
polarity control for intpo_fbcd_pkdet_2. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
2.16.629 Register 11BDh (offset = 11BDh) [reset = 2h]
Figure 2-2892. Register 11BDh
7 6 5 4 3 2 1 0
OVR_SEL_INT
PO_FBCD_PK
DET_2
OVR_INTPO_F
BCD_PKDET_2
R/W-1h R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2908. Register 11BD Field Descriptions
Bit Field Type Reset Description
1-1
OVR_SEL_INTPO_
FBCD_PKDET_2
R/W 1h
control to select whether the input function
intpo_fbcd_pkdet_2 needs to be overriden ot not. 1 indicates
override.
0-0
OVR_INTPO_FBC
D_PKDET_2
R/W 0h
override value for intpo_fbcd_pkdet_2 when
ovr_sel_intpo_fbcd_pkdet_2 is made high
2.16.630 Register 11C0h (offset = 11C0h) [reset = 0h]
Figure 2-2893. Register 11C0h
7 6 5 4 3 2 1 0
POL_INTPO_F
BCD_PKDET_3
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-2909. Register 11C0 Field Descriptions
Bit Field Type Reset Description
0-0
POL_INTPO_FBC
D_PKDET_3
R/W 0h
polarity control for intpo_fbcd_pkdet_3. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal