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Texas Instruments AFE79 Series - 2.4.96 Register 7 Fh (offset = 7 Fh) [reset = 10 h]; 2.4.97 Register 80 h (offset = 80 h) [reset = 11 h]; 2.4.98 Register 81 h (offset = 81 h) [reset = 11 h]

Texas Instruments AFE79 Series
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DAC JESD Register Map
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298
SBAU337May 2020
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Copyright © 2020, Texas Instruments Incorporated
Serial Interface Register Maps
2.4.96 Register 7Fh (offset = 7Fh) [reset = 10h]
Figure 2-325. Register 7Fh
7 6 5 4 3 2 1 0
FRAME_SYNC_ERR_CNT_THRESH
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-329. Register 7F Field Descriptions
Bit Field Type Reset Description
7-4
FRAME_SYNC_ER
R_CNT_THRESH
R/W 1h
JESDB:error count threshold for frame_sync_error(continous
K-characters in middle of data) after which it will pull the syncz
signal and reset the links.
JESDC: error count threshold for fixed ones error after which it
will pull the syncz signal and reset the links
2.4.97 Register 80h (offset = 80h) [reset = 11h]
Figure 2-326. Register 80h
7 6 5 4 3 2 1 0
FRAME_ALIGN_ERR_CNT_THRESH MULTIFRAME_ALIGN_ERR_CNT_THRESH
R/W-1h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-330. Register 80 Field Descriptions
Bit Field Type Reset Description
7-4
FRAME_ALIGN_E
RR_CNT_THRESH
R/W 1h
JESDB:error count threshold for frame alignment error after
which it will pull the syncz signal and reset the links.
JESDC:error count threshold for end of multiblock alignment
error after which it will pull the syncz signal and reset the links.
3-0
MULTIFRAME_ALI
GN_ERR_CNT_TH
RESH
R/W 1h
JESDB:error count threshold for multiframe alignment error
after which it will pull the syncz signal and reset the links.
JESDC:error count threshold for end of extended multiblock
alignment error after which it will pull the syncz signal and
reset the links.
2.4.98 Register 81h (offset = 81h) [reset = 11h]
Figure 2-327. Register 81h
7 6 5 4 3 2 1 0
RBD_BUF_OVERFLOW_ERR_CNT_THRESH LINK_CONFIG_ERR_CNT_THRESH
R/W-1h R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 2-331. Register 81 Field Descriptions
Bit Field Type Reset Description
7-4
RBD_BUF_OVERF
LOW_ERR_CNT_T
HRESH
R/W 1h
JESDB:error count threshold for elastic buffer overflow error
after which it will pull the syncz signal and reset the links.
JESDC:error count threshold for elastic buffer overflow error
after which it will pull the syncz signal and reset the links.
3-0
LINK_CONFIG_ER
R_CNT_THRESH
R/W 1h
JESDB:error count threshold for link configuration error after
which it will pull the syncz signal and reset the links.
JESDC:error count threshold for cmd error in CRC mode after
which it will pull the syncz signal and reset the links.

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